cancel
Showing results for 
Search instead for 
Did you mean: 

AURIX™

User14049
New Contributor
Hi,


I want to configure single pin of aurix for external interrupt. Can any one share code or document for it.

using TC275 controller
0 Likes
3 Replies
User16898
New Contributor
For pin interruption use ERU module.
When you download iLLD from ICP page.
there are some demos provided with library, check ERU_demo.
0 Likes
MatthiasLuh
New Contributor

Hi,

You can use the ERU module to generate up to 4 independent software interrupts. If you need more, you can also consider using the GTM TIM with the Input Event mode (we use both). Here is a code example using the iLLD. No guarantee that this works, I just quickly copy & pasted this from a project! Feel free to ask if something doesn't work.

The code was developed for TC275CA/TC275DC but also works on the TC375AA (not excessively tested yet though!). But it should push you into the right direction. Of course, you need to adapt the code a bit to make it work. Feel free to simplify it as well.

ERU

/*** in your pin_interrupt.h **************************************************/
#define NUM_PIN_ISR_CHANNELS	4
typedef enum
{
	PIN_ISR_CH_0 = 0,
	PIN_ISR_CH_1,
	PIN_ISR_CH_2,
	PIN_ISR_CH_3
} pin_isr_channel_t;
/* Aurix (e.g. tc27xC_um_v2.2.pdf, p.622/5061: "Only four interrupt/service requests are generated by the ERU."
 * these can be mapped to any ERS unit */

typedef void (*pin_isr_function)(void); // typedef for a user-defined interrupt service routine function above the platform abstraction layer

typedef struct
{
	/* pre-configured interrupt pins including GPIO mapping, ERS input channel and ERS unit definition */
	interrupt_pin_t* interrupt_pin;

	pin_in_config_t pin_config;

	pin_interrupt_event_t pin_event;

	/* arbitrarily selectable, however, only 4 software interrupts are available and only one per ERS unit may be used in the current
	 * implementation of this Platform Abstraction Layer. Read "7.4.1 External Request Unit (ERU)" and see "Figure 7-45 Output Gating Unit
	 * for Output Channel y" for more details.
	 */
	pin_isr_channel_t isr_ch;

	/* function to be called on an interrupt event */
	pin_isr_function isr;
} interrupt_pin_config_t;

typedef struct
{
	uint32 num_pin_interrupts;
	interrupt_pin_config_t* interrupt_pin_config;	/* points to an array with num_pin_interrupts configurations */
} external_interrupt_config_t;

__EXTERN__ const Ifx_Priority pin_interrupt_priority[NUM_PIN_ISR_CHANNELS];
__EXTERN__ const IfxSrc_Tos isr_provider_pin[NUM_PIN_ISR_CHANNELS];

void gpio_init_pin_interrupts (external_interrupt_config_t* config);
void gpio_configure_pin_interrupt (interrupt_pin_config_t* interrupt_pin_config);



/*** in your pin_interrupt.c **************************************************/
void gpio_init_pin_interrupts (external_interrupt_config_t* config)
{
	for (uint32 i = 0; i < config->num_pin_interrupts; i++)
	{
		gpio_configure_pin_interrupt(&(config->interrupt_pin_config[i]));
	}
}

/* for Aurix processors, only one interrupt per ERS channel and a total of 4 (software) interrupt service routines are allowed.
 * Take care when designing the board and when coding
 */
void gpio_configure_pin_interrupt (interrupt_pin_config_t* interrupt_pin_config)
{
	/*
	 * When the selected event (edge) is detected, the status flag EIFR.INTFx becomes set.
	 * The status flag is cleared automatically if the “opposite” event is detected, if so enabled
	 * via bit EICRy.LDENx = 1. For example, if only the falling edge detection is enabled to set
	 * the status flag, it is cleared when the rising edge is detected. In this mode, it can be used
	 * for pattern detection where the actual status of the input is important (enabling both edge
	 * detections is not useful in this mode).
	*/

    /* disable interrupts */
    boolean interruptState = IfxCpu_disableInterrupts();

	gpio_set_input(interrupt_pin_config->interrupt_pin->pin, &(interrupt_pin_config->pin_config));
	IfxScuEru_selectExternalInput(interrupt_pin_config->interrupt_pin->input_ch, interrupt_pin_config->interrupt_pin->input_sel);
//	IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel_3, IfxScuEru_InterruptGatingPattern_alwaysActive);
//	IfxScuEru_getOutputChannelConfiguration()
	if (interrupt_pin_config->pin_event == PIN_INTERRUPT_EVENT_FALLING_EDGE)
	{
		IfxScuEru_disableRisingEdgeDetection(interrupt_pin_config->interrupt_pin->input_ch);
		IfxScuEru_enableFallingEdgeDetection(interrupt_pin_config->interrupt_pin->input_ch);
	}
	else if (interrupt_pin_config->pin_event == PIN_INTERRUPT_EVENT_RISING_EDGE)
	{
		IfxScuEru_disableFallingEdgeDetection(interrupt_pin_config->interrupt_pin->input_ch);
		IfxScuEru_enableRisingEdgeDetection(interrupt_pin_config->interrupt_pin->input_ch);
	}
	else /* PIN_INTERRUPT_EVENT_BOTH_EDGES */
	{
		IfxScuEru_enableFallingEdgeDetection(interrupt_pin_config->interrupt_pin->input_ch);
		IfxScuEru_enableRisingEdgeDetection(interrupt_pin_config->interrupt_pin->input_ch);
	}
//	IfxScuEru_enableAutoClear(interrupt_pin_config->interrupt_pin->input_ch);

	pin_interrupt_callback[interrupt_pin_config->isr_ch] = interrupt_pin_config->isr;
	IfxScuEru_enableTriggerPulse(interrupt_pin_config->interrupt_pin->input_ch);

	/* IfxScuEru_InputNodePointer_x "determines the destination (output channel) for trigger event"
	 * e.g. "IfxScuEru_InputNodePointer_3 = Event from input ETLx triggers output OGU3 (signal TRx3)"
	 * see IfxScuEru.hB
	 * OGU0/OGU4 -> use IfxScuEru_InputNodePointer_0,
	 * OGU1/OGU5 -> use IfxScuEru_InputNodePointer_1,
	 * OGU2/OGU6 -> use IfxScuEru_InputNodePointer_2,
	 * OGU3/OGU7 -> use IfxScuEru_InputNodePointer_3
	 *
	 * currently used:
	 * PIN_ISR_CH_0 -> OGU4/IfxScuEru_InputNodePointer_4,
	 * PIN_ISR_CH_1 -> OGU5/IfxScuEru_InputNodePointer_5,
	 * PIN_ISR_CH_2 -> OGU6/IfxScuEru_InpuBtNodePointer_6,
	 * PIN_ISR_CH_3 -> OGU7/IfxScuEru_InputNodePointer_7
	 */
	IfxScuEru_connectTrigger(interrupt_pin_config->interrupt_pin->input_ch, IfxScuEru_InputNodePointer_4 + interrupt_pin_config->isr_ch);

//	/* IGCRm.IPENn */
//	IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel_0 + interrupt_pin_config->isr_ch, IfxScuEru_InputChannel_0 + interrupt_pin_config->interrupt_pin->input_ch, TRUE);
//
//	/* IGCRm.GEENn */
//	IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel_0 + interrupt_pin_config->isr_ch);
//
	/* IGCEm.IGPn */
    IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel_4 + interrupt_pin_config->isr_ch, IfxScuEru_InterruptGatingPattern_alwaysActive);

	IfxScuEru_clearEventFlag(IfxScuEru_InputChannel_0 + interrupt_pin_config->interrupt_pin->input_ch);

    // Unfortunately, there's no IfxScu_get_xxx_Src function
#ifdef PLTF_MCHAL_TC3XX
	IfxSrc_init(&(MODULE_SRC.SCU.SCUERU[interrupt_pin_config->isr_ch]), isr_provider_pin[interrupt_pin_config->isr_ch], pin_interrupt_priority[interrupt_pin_config->isr_ch]);
	IfxSrc_enable(&(MODULE_SRC.SCU.SCUERU[interrupt_pin_config->isr_ch]));
#else
	IfxSrc_init(&(MODULE_SRC.SCU.SCU.ERU[interrupt_pin_config->isr_ch]), isr_provider_pin[interrupt_pin_config->isr_ch], pin_interrupt_priority[interrupt_pin_config->isr_ch]);
	IfxSrc_enable(&(MODULE_SRC.SCU.SCU.ERU[interrupt_pin_config->isr_ch]));
#endif

    /* enable interrupts again if they were previously enabled */
    IfxCpu_restoreInterrupts(interruptState);
}


#define NUM_PIN_ISR_CHANNELS	4

#if defined IFX_INTPRIO_PIN_INT_0 && (NUM_PIN_ISR_CHANNELS > 0)
void __interrupt(IFX_INTPRIO_PIN_INT_0) __vector_table((uint32)ISR_PROVIDER_PIN_INT_0) __enable_ pinIntISR_0(void)
{
	if (pin_interrupt_callback[0] != NULL_PTR)
	{
		(*pin_interrupt_callback[0])();
	}
}
#endif

#if defined IFX_INTPRIO_PIN_INT_1 && (NUM_PIN_ISR_CHANNELS > 1)
void __interrupt(IFX_INTPRIO_PIN_INT_1) __vector_table((uint32)ISR_PROVIDER_PIN_INT_1) __enable_ pinIntISR_1(void)
{
	if (pin_interrupt_callback[1] != NULL_PTR)
	{
		(*pin_interrupt_callback[1])();
	}
}
#endif

#if defined IFX_INTPRIO_PIN_INT_2 && (NUM_PIN_ISR_CHANNELS > 2)
void __interrupt(IFX_INTPRIO_PIN_INT_2) __vector_table((uint32)ISR_PROVIDER_PIN_INT_2) __enable_ pinIntISR_2(void)
{
	if (pin_interrupt_callback[2] != NULL_PTR)
	{
		(*pin_interrupt_callback[2])();
	}
}
#endif

#if defined IFX_INTPRIO_PIN_INT_3 && (NUM_PIN_ISR_CHANNELS > 3)
void __interrupt(IFX_INTPRIO_PIN_INT_3) __vector_table((uint32)ISR_PROVIDER_PIN_INT_3) __enable_ pinIntISR_3(void)
{
	if (pin_interrupt_callback[3] != NULL_PTR)
	{
		(*pin_interrupt_callback[3])();
	}
}
#endif


const Ifx_Priority pin_interrupt_priority[NUM_PIN_ISR_CHANNELS]	= {
#ifdef IFX_INTPRIO_PIN_INT_0
		IFX_INTPRIO_PIN_INT_0
#else
		0
#endif
#if (NUM_PIN_ISR_CHANNELS > 1)
	#ifdef IFX_INTPRIO_PIN_INT_1
		, IFX_INTPRIO_PIN_INT_1
	#else
		, 0
	#endif
#endif
#if (NUM_PIN_ISR_CHANNELS > 2)
	#ifdef IFX_INTPRIO_PIN_INT_2
		, IFX_INTPRIO_PIN_INT_2
	#else
		, 0
	#endif
#endif
#if (NUM_PIN_ISR_CHANNELS > 3)
	#ifdef IFX_INTPRIO_PIN_INT_3
		, IFX_INTPRIO_PIN_INT_3
	#else
		, 0
	#endif
#endif
	};


const IfxSrc_Tos isr_provider_pin[NUM_PIN_ISR_CHANNELS] = {
#ifdef ISR_PROVIDER_PIN_INT_0
		ISR_PROVIDER_PIN_INT_0
#else
		0
#endif
#if (NUM_PIN_ISR_CHANNELS > 1)
	#ifdef ISR_PROVIDER_PIN_INT_1
		, ISR_PROVIDER_PIN_INT_1
	#else
		, 0
	#endif
#endif
#if (NUM_PIN_ISR_CHANNELS > 2)
	#ifdef ISR_PROVIDER_PIN_INT_2
		, ISR_PROVIDER_PIN_INT_2
	#else
		, 0
	#endif
#endif
#if (NUM_PIN_ISR_CHANNELS > 3)
	#ifdef ISR_PROVIDER_PIN_INT_3
		, ISR_PROVIDER_PIN_INT_3
	#else
		, 0
	#endif
#endif
	};



/*** in your Configuration.h (example) ****************************************/
__EXTERN__ void master_pwm_disable_isr();
__EXTERN__ void stm_int3_isr();

interrupt_pin_config_t interrupt_pin_config[NUM_INT_PINS] =
	{
		{
			.interrupt_pin = &interrupt_pin_9,	/* REQ9 / ERS6 / P20.0  / !PWM_EN!_MONITOR_P20.0 */
			.isr = master_pwm_disable_isr,
			.isr_ch = PIN_ISR_CH_0,
			.pin_config =
				{
					.driver_pull = PIN_DRIVER_NO_PULL
				},
			.pin_event = PIN_INTERRUPT_EVENT_RISING_EDGE	// LOW = turn on allowed, HIGH = stop
		},
		{
			.interrupt_pin = &interrupt_pin_3,	/* REQ3 / ERS3 / P10.3 / INT3_S2A */
			.isr = stm_int3_isr,
			.isr_ch = PIN_ISR_CH_1,
			.pin_config =
				{
					.driver_pull = PIN_DRIVER_NO_PULL
				},
			.pin_event = PIN_INTERRUPT_EVENT_RISING_EDGE	// LOW = STM running, HIGH = STM not running
		}
	};
/* TC275 - see: "7.4.1.2 ERU Input Pin Connections", page 614 ff. in tc27xD_um_v2.2.pdf
 *		also consider "Figure 7-43 Event Trigger Logic Overview"
 *		and "Figure 7-44 Connecting Matrix between ETLx and OGUy"
 *		and "Figure 7-45 Output Gating Unit for Output Channel y"
 *		and "Figure 7-46 External Request Unit Output Connections for TC27x"
 * TC375 - see: "Figure 73 External Request Unit Overview", page 707 ff. in AURIXTC3XX_um_part1_v2.0.pdf
 *		and "Figure 76 Event Trigger Logic Overview"
 * 		and "Figure 77 Connecting Matrix between ETLx and OGUy"
 *		and "Figure 78 Output Gating Unit for Output Channel y"
 *		and for pin connections: "9.4 Connectivity", page 120 ff. in TC37x_appx_um_v2.0.pdf
 */

external_interrupt_config_t external_interrupt_config =
	{
		.num_pin_interrupts = NUM_INT_PINS,
		.interrupt_pin_config = interrupt_pin_config
	};



/*** in your user application init function ***********************************/
gpio_init_pin_interrupts(&external_interrupt_config);


GTM TIM

/*** in your init function ****************************************************/
/* EIS1_V_PH	= 15.8	= TIM1(/0) CH2, TIN79	==> I use this for PWM duty/period measurement, so an ISR
 * EIS1_I_PH	= 14.7	= TIM1(/0) CH0, TIN87   	will be called every edge starting from the 2nd (!) edge
 *
 * BTN_1		= 33.0	= TIM1(/0) CH4, TIN22	==> I use the following pins for pin interrupt generation, so
 * I_ALERT_A1	= 20.9	= TIM2(/3) CH5, TIN65		an ISR will be called every edge starting from the 1st edge
 * !OCD_01!		= 13.0	= TIM3(/2) CH5, TIN91		--> probably what you want!
 * !OCD_02!		= 13.3	= TIM3(/2) CH0, TIN94
 * !OCD_03!		= 14.9	= TIM3(/2) CH3, TIN89
 * !OCD_04!		= 14.10	= TIM3(/2) CH4, TIN90
 */
// see page 3501 / 25-774 ff. in tc27xD_um_v2.2.pdf when using TC275
// 		25.22.2.1 Port to GTM Control Registers
// see page 439 / 26-59 ff. in TC37x_appx_um_v2.0.pdf when using TC375
//		26.3.2 Port to GTM TIM Connections

MODULE_GTM.TIMINSEL[1].B.CH2SEL = 0x5; /* 0101_B = P15.8	TIN79  --> EIS1_V_PH */
MODULE_GTM.TIMINSEL[1].B.CH0SEL = 0x5; /* 0101_B = P14.7	TIN87  --> EIS1_I_PH */

MODULE_GTM.TIMINSEL[1].B.CH4SEL = 0x6; /* 0110_B = P33.0	TIN22 --> BTN_1 */

MODULE_GTM.TIMINSEL[2].B.CH5SEL = 0x5; /* 0101_B = P20.9	TIN65  --> I_ALERT_A1 */

MODULE_GTM.TIMINSEL[3].B.CH5SEL = 0x3; /* 0011_B = P13.0	TIN91 --> !OCD_01! */
MODULE_GTM.TIMINSEL[3].B.CH0SEL = 0x3; /* 0011_B = P13.3	TIN94 --> !OCD_02! */
MODULE_GTM.TIMINSEL[3].B.CH3SEL = 0x3; /* 0011_B = P14.9	TIN89 --> !OCD_03! */
MODULE_GTM.TIMINSEL[3].B.CH4SEL = 0x3; /* 0011_B = P14.10 TIN90 --> !OCD_04! */

/* TBU0 konfigurieren (time base unit) */
MODULE_GTM.TBU.CH0_BASE.B.BASE = 0;
MODULE_GTM.TBU.CH0_CTRL.B.LOW_RES = 0;
MODULE_GTM.TBU.CH0_CTRL.B.CH_CLK_src=7;	/* CMU_CLK7 */
MODULE_GTM.TBU.CHEN.B.ENDIS_CH0 = 0x2;		/* enable channel 0 */

/*** I use this for PWM duty/period measurement, so an ISR will be called every edge starting from the 2nd (!) edge */
Ifx_GTM_TIM_CH* eis1_v_ph_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[EIS_V_PH_TIM]), EIS_V_PH_TIM_CH);
eis1_v_ph_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_pwmMeasurement;	// note that IfxGtm_Tim_Mode_pwmMeasurement will only give an interrupt after the 2nd edge! use IfxGtm_Tim_Mode_inputEvent if an IRQ is required starting from the first edge on after the microcontroller starts
eis1_v_ph_ch->CTRL.B.GPR0_SEL = 0x3;		/* CNTS stored in GPR0 = duty */
eis1_v_ph_ch->CTRL.B.GPR1_SEL = 0x0;		/* TBU_TS0 stored in GPR1 = timestamp */
eis1_v_ph_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
eis1_v_ph_ch->CTRL.B.DSL = 1;				/* Measurement starts with rising edge (high level measurement), IRQ on next rising edge */
eis1_v_ph_ch->CTRL.B.TIM_EN = 1;			/* enable TIM channel */
eis1_v_ph_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
eis1_v_ph_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

Ifx_GTM_TIM_CH* eis1_i_ph_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[EIS_I_PH_TIM]), EIS_I_PH_TIM_CH);
eis1_i_ph_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_pwmMeasurement;
eis1_i_ph_ch->CTRL.B.GPR0_SEL = 0x3;		/* CNTS stored in GPR0 = duty */
eis1_i_ph_ch->CTRL.B.GPR1_SEL = 0x0;		/* TBU_TS0 stored in GPR1 = timestamp */
eis1_i_ph_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
eis1_i_ph_ch->CTRL.B.DSL = 1;				/* Measurement starts with rising edge (high level measurement), IRQ on next rising edge */
eis1_i_ph_ch->CTRL.B.TIM_EN = 1;			/* enable TIM channel */
eis1_i_ph_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
eis1_i_ph_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

/*** I use the following pins for pin interrupt generation, so an ISR will be called every edge starting from the 1st edge */
Ifx_GTM_TIM_CH* btn1_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[1]), 4);
btn1_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_inputEvent;
btn1_ch->CTRL.B.GPR0_SEL = 0x3;			/* CNTS stored in GPR0 = duty */
btn1_ch->CTRL.B.GPR1_SEL = 0x3;			/* CNT stored in GPR1 = period */
btn1_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
btn1_ch->CTRL.B.DSL = 1;					/* Measurement starts with rising edge (high level measurement), IRQ on next rising edge */
btn1_ch->CTRL.B.TIM_EN = 1;				/* enable TIM channel */
btn1_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
btn1_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

Ifx_GTM_TIM_CH* i_alert_a1_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[2]), 5);
i_alert_a1_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_inputEvent;
i_alert_a1_ch->CTRL.B.GPR0_SEL = 0x3;			/* CNTS stored in GPR0 = duty */
i_alert_a1_ch->CTRL.B.GPR1_SEL = 0x3;			/* CNT stored in GPR1 = period */
i_alert_a1_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
i_alert_a1_ch->CTRL.B.DSL = 1;					/* Measurement starts with rising edge (high level measurement), IRQ on next rising edge */
i_alert_a1_ch->CTRL.B.TIM_EN = 1;				/* enable TIM channel */
i_alert_a1_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
i_alert_a1_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

Ifx_GTM_TIM_CH* ocd1_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[3]), 5);
ocd1_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_inputEvent;
ocd1_ch->CTRL.B.GPR0_SEL = 0x3;					/* CNTS stored in GPR0 = duty */
ocd1_ch->CTRL.B.GPR1_SEL = 0x3;					/* CNT stored in GPR1 = period */
ocd1_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
ocd1_ch->CTRL.B.DSL = 0;						/* Measurement starts with falling edge (low level measurement), IRQ on next falling edge */
ocd1_ch->CTRL.B.TIM_EN = 1;						/* enable TIM channel */
ocd1_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
ocd1_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

Ifx_GTM_TIM_CH* ocd2_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[3]), 0);
ocd2_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_inputEvent;
ocd2_ch->CTRL.B.GPR0_SEL = 0x3;					/* CNTS stored in GPR0 = duty */
ocd2_ch->CTRL.B.GPR1_SEL = 0x3;					/* CNT stored in GPR1 = period */
ocd2_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
ocd2_ch->CTRL.B.DSL = 0;						/* Measurement starts with falling edge (low level measurement), IRQ on next falling edge */
ocd2_ch->CTRL.B.TIM_EN = 1;						/* enable TIM channel */
ocd2_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
ocd2_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

Ifx_GTM_TIM_CH* ocd3_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[3]), 3);
ocd3_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_inputEvent;
ocd3_ch->CTRL.B.GPR0_SEL = 0x3;					/* CNTS stored in GPR0 = duty */
ocd3_ch->CTRL.B.GPR1_SEL = 0x3;					/* CNT stored in GPR1 = period */
ocd3_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
ocd3_ch->CTRL.B.DSL = 0;						/* Measurement starts with falling edge (low level measurement), IRQ on next falling edge */
ocd3_ch->CTRL.B.TIM_EN = 1;						/* enable TIM channel */
ocd3_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
ocd3_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;

Ifx_GTM_TIM_CH* ocd4_ch = IfxGtm_Tim_getChannel(&(MODULE_GTM.TIM[3]), 4);
ocd4_ch->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_inputEvent;
ocd4_ch->CTRL.B.GPR0_SEL = 0x3;					/* CNTS stored in GPR0 = duty */
ocd4_ch->CTRL.B.GPR1_SEL = 0x3;					/* CNT stored in GPR1 = period */
ocd4_ch->CTRL.B.CLK_SEL = IfxGtm_Cmu_Clk_7;
ocd4_ch->CTRL.B.DSL = 0;						/* Measurement starts with falling edge (low level measurement), IRQ on next falling edge */
ocd4_ch->CTRL.B.TIM_EN = 1;						/* enable TIM channel */
ocd4_ch->IRQ.EN.B.NEWVAL_IRQ_EN = 1;
ocd4_ch->IRQ.MODE.B.IRQ_MODE = IfxGtm_IrqMode_pulseNotify;


volatile Ifx_SRC_SRCR *tmp_src=0;

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, EIS_V_PH_TIM_ENUM, EIS_V_PH_TIM_CH_ENUM);
IfxSrc_init(tmp_src, ISR_PROVIDER_EIS_V_PH, IFX_INTPRIO_EIS_V_PH);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, EIS_I_PH_TIM_ENUM, EIS_I_PH_TIM_CH_ENUM);
IfxSrc_init(tmp_src, ISR_PROVIDER_EIS_I_PH, IFX_INTPRIO_EIS_I_PH);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, IfxGtm_Tim_1, IfxGtm_Tim_Ch_4);
IfxSrc_init(tmp_src, ISR_PROVIDER_BTN_1, IFX_INTPRIO_BTN_1);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, IfxGtm_Tim_2, IfxGtm_Tim_Ch_5);
IfxSrc_init(tmp_src, ISR_PROVIDER_ALERT_ADC1_I, IFX_INTPRIO_ALERT_ADC1_I);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, IfxGtm_Tim_3, IfxGtm_Tim_Ch_5);
IfxSrc_init(tmp_src, ISR_PROVIDER_ALERT_CELL_I0, IFX_INTPRIO_ALERT_CELL_I0);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, IfxGtm_Tim_3, IfxGtm_Tim_Ch_0);
IfxSrc_init(tmp_src, ISR_PROVIDER_ALERT_CELL_I1, IFX_INTPRIO_ALERT_CELL_I1);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, IfxGtm_Tim_3, IfxGtm_Tim_Ch_3);
IfxSrc_init(tmp_src, ISR_PROVIDER_ALERT_CELL_I2, IFX_INTPRIO_ALERT_CELL_I2);
IfxSrc_enable(tmp_src);

tmp_src=IfxGtm_Tim_Ch_getSrcPointer(&MODULE_GTM, IfxGtm_Tim_3, IfxGtm_Tim_Ch_4);
IfxSrc_init(tmp_src, ISR_PROVIDER_ALERT_CELL_I3, IFX_INTPRIO_ALERT_CELL_I3);
IfxSrc_enable(tmp_src);


/* set CMU7 clock to maximum frequency end enable it*/
IfxGtm_Cmu_setClkFrequency(&MODULE_GTM, IfxGtm_Cmu_Clk_7, IfxGtm_Cmu_getGclkFrequency(&MODULE_GTM));
IfxGtm_Cmu_enableClocks(&MODULE_GTM, IFXGTM_CMU_CLKEN_CLK7);


	
/*** in your Ifx_Cfg_Isr.h ****************************************************/

#define IFX_INTPRIO_BTN_1							3					// GTM TIM pin interrupt
#define ISR_PROVIDER_BTN_1							ISR_PROVIDER_CPU0

#define IFX_INTPRIO_ALERT_ADC1_I					190					// GTM TIM pin interrupt
#define ISR_PROVIDER_ALERT_ADC1_I					ISR_PROVIDER_CPU0

#define IFX_INTPRIO_EIS_V_PH						186					// GTM TIM pin interrupt
#define ISR_PROVIDER_EIS_V_PH						ISR_PROVIDER_CPU1

#define IFX_INTPRIO_EIS_I_PH						184					// GTM TIM pin interrupt
#define ISR_PROVIDER_EIS_I_PH						ISR_PROVIDER_CPU1



/*** somewhere in your Application ********************************************/
void __interrupt(IFX_INTPRIO_ALERT_ADC1_I) __vector_table((uint32)ISR_PROVIDER_ALERT_ADC1_I) __enable_ gtm_tim_alert_adc1_i_isr (void)
{
	// your code
	
}

void __interrupt(IFX_INTPRIO_BTN_1) __vector_table((uint32)ISR_PROVIDER_BTN_1) __enable_ gtm_tim_btn_1_isr (void)
{
	// your code
	
}
//...

 

Best regards,
Matthias

0 Likes
FD_aurix
New Contributor II

Hi Matthias

Thanks for your reply and for the snipped code. I'll check it in the next days.

 

0 Likes