Example for multiple synchronized EVADC HW Trigger with DMA

[User22837]

Hello Aurix people,

can somebody please help me by providing a code example which is descripted in following document on page 6?

https://www.infineon.com/dgdl/Infineon-AURIX_Versatile_Analog-to-Digital_Converter-TR-v01_00-EN.pdf?...

I already tried almost all adc examples provided by the Aurix examples from infineon and read the UM vol 2 chapter 26.25.9 and the UM Appendix TC38X chapter 26.3.9. I am using the TC387 Core.

[AMG]

Hello, 

If you would like to configure the DMA to transfer EVADC conversion results, please consider having a look at the following AURIX expert training: link

The "DMA_ADC_Transfer_1 for KIT_AURIX_TC397_TFT" expert training comes with a demo project that can easily be imported in AURIX Development Studio following the steps:

• In the Quick Links window at the bottom left of the screen, click on "import AURIX project"
• In the window that opens choose "Infineon Code Examples Repository" for "Select a code examples repository"
• Select the "DMA_ADC_Transfer_1_Kit_TC397_TFT" 
• Click on finish 

This demo project provides the code example to configure an EVADC channel using DMA. Although the project is meant for TC397, the code can be re-used for TC38x as long as it is used in a dedicated TC38x project. 

Feel free to configure multiple channels ADC to reach the configuration specified in the slides. 

For the use case not using DMA, have a look at the "ADC_Single_Channel_1 for KIT_AURIX_TC397_TFT" (link) and the related demo project in AURIX Development Studio. 

Regarding the synchronization of the ADC channels, the TC3xx User Manual Part 2, "32.11.1 Synchronized Conversions for Parallel Sampling" provides the important information needed, please have a look at the page 1224 following this link.

I hope this information helps.

[User22837 · Accepted solution]

Hello,

thank you very much for the fast response !

Can you please help me by connect a ATOM to ADC trigger (HW Trigger) by providing a code example?

I want a functionality like in the CCU6_ADC Infineon Aurix example but instead of CCU6 it should be with a ATOM timer.

I added already the "IfxGtm_Trig_toEVadc()" function and configured the related ATOM timer.

Is there an code example where the necessary registers to trigger an ADC with an ATOM timer is descripted?

[User22837]

I have this code and i think i miss something:

#include "CCU6_ADC.h"
#include "Ifx_Types.h"
#include "IfxAsclin_Asc.h"
#include "IfxCcu6_Timer.h"
#include "IfxEvadc_Adc.h"
#include "IfxGtm.h"
#include "IfxGtm_Atom.h"
#include "IfxGtm_Atom_Timer.h"
#include "IfxGtm_Trig.h"
#include "IfxGtm_Atom_Pwm.h"

#define ISR_PRIORITY_ADC 4 /* ADC result interrupt's priority */
#define ISR_PRIORITY_ATOM 5 /* Interrupt priority number */
#define ADC_CHANNEL 0 /* ADC channel number */
#define ADC_GROUP IfxEvadc_GroupId_0 /* EVADC group */
#define ENABLE_EXTERNAL_TRIGGER 0x80 /* Mask to enable external triggers on ADC */
#define ATOM_FREQ 10.0f /* ATOM frequency */
#define CMU_FREQ 1000000.0f /* CMU clock frequency */

IfxEvadc_Adc g_evadc;
IfxEvadc_Adc_Group g_adcGroup;
IfxEvadc_Adc_Channel g_adcChannel;

IfxCcu6_Timer g_timer;
IfxGtm_Atom_Timer g_timerDriver;

void init_ATOM(void)
{
IfxGtm_enable(&MODULE_GTM); /* Enable GTM */

IfxGtm_Atom_Timer_Config timerConfig; /* Timer configuration structure */
IfxGtm_Atom_Timer_initConfig(&timerConfig, &MODULE_GTM); /* Initialize default parameters */

timerConfig.atom = IfxGtm_Atom_0; /* Select the ATOM_0 */
timerConfig.timerChannel = IfxGtm_Atom_Ch_4; /* Select channel 0 */
timerConfig.clock = IfxGtm_Cmu_Clk_0; /* Select the CMU clock 0 */
timerConfig.base.frequency = ATOM_FREQ; /* Set timer frequency */
timerConfig.base.isrPriority = ISR_PRIORITY_ATOM; /* Set interrupt priority */
timerConfig.base.isrProvider = IfxSrc_Tos_cpu0; /* Set interrupt provider */

IfxGtm_Cmu_setClkFrequency(&MODULE_GTM, IfxGtm_Cmu_Clk_0, CMU_FREQ); /* Set the clock frequency */
IfxGtm_Cmu_enableClocks(&MODULE_GTM, IFXGTM_CMU_CLKEN_CLK0); /* Enable the CMU clock 0 */
IfxGtm_Atom_Timer_init(&g_timerDriver, &timerConfig); /* Initialize the ATOM */

IfxGtm_Trig_toEVadc(&MODULE_GTM, IfxGtm_Trig_AdcGroup_0, IfxGtm_Trig_AdcTrig_0, IfxGtm_Trig_AdcTrigSource_atom2, IfxGtm_Trig_AdcTrigChannel_4);

IfxGtm_Atom_Timer_run(&g_timerDriver); /* Start the ATOM */

}

void init_EVADC()
{
init_EVADC_module(); /* Initialize the EVADC module */
init_EVADC_group(); /* Initialize the EVADC group */
init_EVADC_channels(); /* Initialize the channels */
}

void init_EVADC_module()
{
/* Create configuration */
IfxEvadc_Adc_Config adcConfig;
IfxEvadc_Adc_initModuleConfig(&adcConfig, &MODULE_EVADC);

/* Initialize module */
IfxEvadc_Adc_initModule(&g_evadc, &adcConfig);
}

/* Function to initialize the EVADC group */
void init_EVADC_group()
{
/* Create and initialize group configuration with default values */
IfxEvadc_Adc_GroupConfig adcGroupConfig;
IfxEvadc_Adc_initGroupConfig(&adcGroupConfig, &g_evadc);

/* Setting user configuration using group 0 */
adcGroupConfig.groupId = ADC_GROUP;
adcGroupConfig.master = adcGroupConfig.groupId;

/* Enable queue 0 source */
adcGroupConfig.arbiter.requestSlotQueue0Enabled = TRUE;

/* Enable all gates in "always" mode (no edge detection) */
adcGroupConfig.queueRequest[0].triggerConfig.gatingMode = IfxEvadc_GatingMode_always;

/* Configure the EVADC module to trigger a conversion based on CCU6 timer period match event */
/* Trigger 0 is connected to CCU6 ServiceRequest_3 line */
adcGroupConfig.queueRequest[0].triggerConfig.triggerSource = IfxEvadc_TriggerSource_0;

/* Select the trigger event type */
adcGroupConfig.queueRequest[0].triggerConfig.triggerMode = IfxEvadc_TriggerMode_uponRisingEdge;

/* Set that requests with higher priority cancel a running lower priority conversion */
adcGroupConfig.queueRequest[0].requestSlotStartMode = IfxEvadc_RequestSlotStartMode_cancelInjectRepeat;

/* Initialize the group */
IfxEvadc_Adc_initGroup(&g_adcGroup, &adcGroupConfig);
}

/* Function to initialize the EVADC channel */
void init_EVADC_channels()
{
/* Create channel configuration */
IfxEvadc_Adc_ChannelConfig adcChannelConfig;

IfxEvadc_Adc_initChannelConfig(&adcChannelConfig, &g_adcGroup);

adcChannelConfig.channelId = (IfxEvadc_ChannelId)(ADC_CHANNEL);
adcChannelConfig.resultRegister = (IfxEvadc_ChannelResult)(ADC_CHANNEL);

/* Interrupt for sending the data via UART */
adcChannelConfig.resultPriority = ISR_PRIORITY_ADC; /* Set the EVADC interrupt priority */
adcChannelConfig.resultServProvider = IfxSrc_Tos_cpu0; /* Set the EVADC interrupt service provider */

/* Initialize the channel */
IfxEvadc_Adc_initChannel(&g_adcChannel, &adcChannelConfig);

/* Add channel to queue with refill and external trigger enabled */
IfxEvadc_Adc_addToQueue(&g_adcChannel, IfxEvadc_RequestSource_queue0, (ENABLE_EXTERNAL_TRIGGER | IFXEVADC_QUEUE_REFILL));
}

/* ADC Interrupt Service Routine */
IFX_INTERRUPT(ISR_ADC_result, 0, ISR_PRIORITY_ADC);

void ISR_ADC_result(void)
{
/* Get the result from the EVADC result register and print it using the UART communication */
Ifx_EVADC_G_RES conversionResult = IfxEvadc_Adc_getResult(&g_adcChannel);
}

IFX_INTERRUPT(interruptHandlerGtmAtom, 0, ISR_PRIORITY_ATOM);

void interruptHandlerGtmAtom(void)
{
IfxGtm_Atom_Timer_acknowledgeTimerIrq(&g_timerDriver); /* Reset the timer event */
}

[AMG]

Hello, 

Assuming that your GTM interrupt is functional, I will try to detail a use case using EVADC ADC HW Unit 0, to use the ATOM0 Channel 4  as a trigger. This is explained through one table and one graph that lead to one specific register in the TC38x User's Manual Appendix (link). 

First let's have a look at the table "Table 317 Digital Connections for Product TC38x" (page 865-866).  We can see there are four signal names for "GTM to ADC Trigger x", with "x" going from 0 to 3. 

Let's assume, we want to use: GTM to ADC Trigger 0, then the signal name is: "GxREQTRI"

So far, we are using ADC0, and signal GTM to ADC Trigger 0. 

Now let's focus on the "Figure 20 GTM to EVADC Connections Overview" (page 799). 

We know we are using GTM to ADC Trigger 0 and ADC0 in the figure we will focus on the top part of the figure, specifically on the line "ADC_TRIG0[0]"

If we had chosen GTM to ADC Trigger 3 and ADC 5, we would focus on the line: "ADC_TRIG3[5]"

From "ADC_TRIG0[0]", we can deduct that the register to configure is ADCTRIG0OUT0 (see register GTM_ADCRIGiOUT0 page 801). 

In this register, the ATOM0 Channel 4 corresponds to the hex value "5". 

Please make sure that the GTM interrupt and the ADC channel are probably configured, as well as the link between the GTM interrupt and the ADC trigger is properly done following the information given in this comment. 

I hope this helps you achieve your configuration! 

[User22837]

Thank you for this detailed help !