AURIX™ Forum Discussions

[User19601]

I have query regarding 'Reading Erased PFlash by HSM Core' in Aurix TC399 Microcontroller.
One of the use case in our product requires that HSM Core has to read PFLASH memory area in order to calculate AES-CMAC.

i am aware that if any of the CPUx reads an Erased FLash Page from PFlash, it will encounter an ECC exception. And there is way to disable this using FLASHCON1.MASKUECC and FLASHCON2.ECCCORDIS.
But i want to ask that, Can i also disable the ECC exception by modifying the above register for HSM core also. Or is there any other way to disable the erase flash read ecc exception for HSM core.
What i want is to calculate the CMAC of a PFLASH memory range using HSM core, this memory range will contain both erase and written pages. I want no ECC exception on HSM core when HSM core reads the the PFlash. And i also want that CMAC result is the same each time, i mean reading erased PFLASH pages by HSM core shall return a fixed data e.g all zeroes with no ECC exception.
Thank you for your help.

[NeMa_4793301]

This usually doesn't work out - you're generally better off using the PMU Verify Erased commands to detect erased memory.

Reading from erased PFLASH swamps the ECC algorithm, which means it sometimes returns 1 bits here and there.

What if the TriCore encounters a real uncorrectable error while the HSM is reading its PFLASH range? Disabling ECC can result in incorrect instructions or incorrect data.

[User19667]

I have the same question。

Bootloader always erase some sectors of flash,And failed to reprogram them for some reason (such as power loss). Bootloader need to check if these sectors are reprogrammed after a reboot

[Darren_Galpin]

The FLASHCON registers in a given CPU are applied to the PFLASH interface attached to that CPU. Hence if the HSM accesses the PFLASH attached to CPU0, then the CPU0 FLASHCON registers could be used to modify the ECC behaviour and correction responses for that PFLASH. There are no specific FLASHCON registers for the HSM.