EXternal clock not working - EXTCON0

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DSRnathan
Level 3
Level 3
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Hello,
I am trying to use the external clock where I configure the register and relavant pin according to the requirement but the clock is not produced as expected.
using TC277 micro.

clear safety()

Extcon.B.EN0 = 1;
Extcon.B.SEL0 = 0x9;using fspb source
Extcon.B.NSEL = 1;

Set safety()
IfxPort_setPinMode(PINOUT, IfxPort_Mode_outputPushPullAlt6); PINOUT is defined to be P23,1
IfxPort_setPinPadDriver(PINOUT, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Kindly shed some light, what else I am missing to initialise.

Thank you in advance.

Deepak
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6 Replies
NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
Hi Deepak. Try doing EN0 last instead of first.

Also, IfxPort_setPinPadDriver should be inside an ENDINIT (not Safety ENDINIT) protection clear/set sequence.

Are you seeing anything on the output? Putting fSPB out directly is probably too fast on an MP+ pad: the datasheet lists 4.5 ns max rise/fall time. I would expect something vaguely sine-wavy instead of a square wave.

Have you tried it with a divider in FDR?
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cwunder
Employee
Employee
5 likes given 50 likes received 50 solutions authored
You need a good quality scope to see this signal at the pin assuming the fSPB = 100MHz.
4022.attach
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DSRnathan
Level 3
Level 3
50 sign-ins 25 replies posted 25 sign-ins
Hello,
Thank you for the replies.
1) I have tried by setting EN0 register value after SEL0 with FDR and my code look as below

IfxScuWdt_clearSafetyEndinitInline(IfxScuWdt_getSafetyWatchdogPasswordInline());

Extcon.B.SEL0 = 0x1;
Extcon.B.EN0 = 1;
Extcon.B.NSEL = 1;
SCU_FDR.B.STEP = 0x3CE; /* Set FDR step */
SCU_FDR.B.DM = 1; /* Set divider mode to normal */
IfxPort_setPinPadDriver(PINOUT, 0);

IfxScuWdt_setSafetyEndinitInline(IfxScuWdt_getSafetyWatchdogPasswordInline());

I cannot see any output from the desired pin. I am using Picoscope which is capable of measuring bandwidth upto 200Mhz.

Kindly shed some light as I am missing something here.

Deepak
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DSRnathan
Level 3
Level 3
50 sign-ins 25 replies posted 25 sign-ins
hello Guys,
It worked, I used IfxScuWdt_clearSafetyEndinit(IfxScuWdt_getSafetyWa tchdogPassword()); as cwunder(Chris) said and now I can able to gerate a clock frequency.

I am trying to figure out FDR STEP calculation for generation ~30 MHz from fSPB = 100 Mhz.
Kindly shed some light.

Thank you guys for your support.

Deepak
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NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
Hi Deepak. See formula 7.24 on page 467 of TC27xD_um_v2.2.pdf for Normal Divider Mode, and formula 7.25 for Fractional Divider Mode.

In Normal Divider Mode:
FDR.STEP=1023 => 50 MHz
FDR.STEP=1022 => 25 MHz

In Fractional Divider Mode, it's important to note that the logic runs at 100 MHz, so this part of the user manual is very important:
Note that in Fractional Divider Mode the clock fOUT can have a maximum period jitter of one fSPB clock period.


In Fractional Divider Mode:
FDR.STEP=683 => 33.35 MHz (with an irregular duty cycle and period)
FDR.STEP=512 => 25 MHz (40 ns period)
FDR.STEP=256 => 12.5 MHz (80 ns period)
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DSRnathan
Level 3
Level 3
50 sign-ins 25 replies posted 25 sign-ins
Thank you guys(UC_wrnagler and Chris) for the detailed explanation, finally everything works.
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