EVADC Valid flag randomly shows 0 while linked with DMA

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SivakumarG
Level 1
Level 1
50 sign-ins 25 sign-ins 5 replies posted

Hello Experts,

I have configured EVADC and DMA. If result register is updated then DMA will be called for buffer update.

Some times i am getting Valid flag as 0 in result register.

Can any one explain, why i am getting VF as 0 ?

SivakumarG_1-1678802689794.png

 

here i am taking entire 32 bit result value to the buffer.

 

 

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Aiswarya_A
Moderator
Moderator
Moderator
25 likes received 250 sign-ins 50 solutions authored

Hello,


A possible reason for the VF bit to be zero is ADC result updating is done internally by ADC itself. When ADC is updating its result register, and at the same time CPU and/or DMA wants to read it,  then the  old ADC result will be obtained (VF=0) . If CPU and/or DMA reads ADC shortly later (when the ADC result update is already finished), the new result will be obtained (VF=1) .

 

Regards,
Aiswarya.

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Aiswarya_A
Moderator
Moderator
Moderator
25 likes received 250 sign-ins 50 solutions authored

Hello,


A possible reason for the VF bit to be zero is ADC result updating is done internally by ADC itself. When ADC is updating its result register, and at the same time CPU and/or DMA wants to read it,  then the  old ADC result will be obtained (VF=0) . If CPU and/or DMA reads ADC shortly later (when the ADC result update is already finished), the new result will be obtained (VF=1) .

 

Regards,
Aiswarya.

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