EVADC Trigger on Falling Edge of ATOM/ PWM

[nsyed]

EVADC Trigger on Falling Edge of ATOM/ PWM

Hello,

I am using TC377 MCU, and trying to configure Group 8 EVADC Trigger based on falling edge of ATOM channel.

Attached is my configuration. For some reason the EVADC Trigger occurs on the raising edge and not on the falling edge. I configured the G8QCTRO0[XTMODE] = Falling edge.

ATOM_0 CH_3 is used to trigger Group8 EVADC

Any thoughts ?

[FD_aurix]

A couple of test:

Try to disable the DTM and check the configuration, in particular the DT/SL/OC/POL/SWAP configuration (Figure 98 user manual 2)

Check if it might be related to the level (SL)

[KB]

Hi nsyed,

From the register configuration shared I see you have configured GTM_TOUTSEL2->SEL0 = 0x8, which corresponds to "Inverted dead-time output of ATOM0, channel 3".

Could you check the corresponding DTM channel(CDTM0_DTM4_3) register's CTL2 polarity settings ?

Regards,

KB

[nsyed]

I reviewed CDTM0 module and did not find anything obvious. Any thoughts ?

Am I missing something ?

Attached is my complete register configuration 

[nsyed]

Any thoughts ? 

[KB]

Hi nsyed,

I need some additional info.

1. What happens if you change the G8QCTRL0[XTMODE] to rising edge? is the behavior same as falling edge?

2. How are you verifying the trigger edge ? are you generating an "request source event" interrupt to verify the trigger edge by comparing it with ATOM generated PWM edge?

Thank you.

[KB · Accepted solution]

Hi nsyed,

I was going through the register config shared by you.  Since you have already mapped the trigger signal(XTSEL) to your GTM's  adc_trig3 as source, you don't have to map the EVADC's gating signal to same source as well (GTSEL  not reqd. for your application).

Therefore you may configure G8QMR0->ENGT to 1 since REQGT is not used,  EVADC is only dependent on REQTR. The conversion should start as soon as there is trigger and should not wait for REGQT to become HIGH.

You can try it out and let me know if it works.

Thank you.

[nsyed]

Hello @KB,

Thank you so much. I remove the EVADC gating signal mapping (GTSEL) and it works fine now. I can now change configuration of EVADC and trigger for both rising/falling edge of the PWM.

Yes, I am generating a interrupt after conversion and toggle a GPIO to verify the trigger edge and compare it with ATOM PWM edge.

Attached are the oscilloscope plots after the fix, just for reference.

Thank you so much for your help !!! Appreciate it.

@FD_aurix, Thank you for your insight as well. Appreciate it!!!