EVADC: REVNP, CEVNP and SENP

[FD_aurix]

Hi all

I'm trying to understand how does it work the Event handling and routing 

Let's assume I've the G0CH0 configured and I want to set G0SR0 (to activate an interrupt) at the end of conversion. How could I do?

The part of the interrupt configuration itself is clear, I can manage it, what I can't understand is the proper use of REVNP, CEVNP and SENP registers.

As far as I've understood each Gx channel could generate 3 different event that could be routed out as service request

REVNP Result Event Node Pointer These registers handle the events generated by new result values being available in the result registers One for each Gx channel

SEVNP Source Event Node Pointer These registers handle the events generated by the conversion request sources (Q0, Q1, Q2).  One for each group

CEVNP Channel Event Node Pointer These registers handle the events generated by conversions, in particular during limit checking.  One for each Gx channel

With the CENVP/SENVP/REVNP I can route these signal out assigning them to a GxSRy or CxSRy service request

Keeping all the default of the above register (0x00000000)  G0SR0 ir selected for Result event, Source event and channel event.

.

But How can I "enable" or "disable" each event for a single channel?

[FD_aurix]

I've done some test and it seems that only SEVNP make some effect on G0SR0, others two register seems related to something of disabled. How can I activate them?

[FD_aurix]

Anyone has an idea?

[FD_aurix]

Anyone has an idea?

[Nambi · Accepted solution]

Hi,

Please find the answers below.

As far as I've understood each Gx channel could generate 3 different event that could be routed out as service request
REVNP Result Event Node Pointer These registers handle the events generated by new result values being available in the result registers One for each Gx channel
Ans: Result event is generated whenever a new result value becomes available (mainly for data reduction mode). Flag bits REV0…15 corresponds to result register 0…15. It is enabled by SRGEN bit.

SEVNP Source Event Node Pointer These registers handle the events generated by the conversion request sources (Q0, Q1, Q2). One for each group
Ans: A request source event of a queued source occurs when a conversion is finished. Here one conversion means all the channels included in the Queue request have been converted. All these channels can only be within one group, because Q can only include channels in the same group. Flag bits SEV0/1/2 corresponds to conversion request source Q0/1/2. It is enabled by ENSI bit.

CEVNP Channel Event Node Pointer These registers handle the events generated by conversions, in particular during limit checking. One for each Gx channel
Ans: Channel events can be generated whenever a new result value becomes available (mainly for limit checking purpose). Channel event generation can be restricted to values that lie inside or outside a user-configurable band. Flag bits CEV0…15 corresponds to channel 0…15. It is enabled by CHEVMODE bit.

With the CENVP/SENVP/REVNP I can route these signal out assigning them to a GxSRy or CxSRy service request
Ans: yes.

Keeping all the default of the above register (0x00000000) G0SR0 ir selected for Result event, Source event and channel event.
Ans: To be more accurate, default value 0 will route interrupt events to GxSR0.

But How can I "enable" or "disable" each event for a single channel?
Ans: Result event and Channel event are similar. Both can be generated when one result is generated. Difference is, Result event is mainly for data reduction mode and Channel event is for limit checking purpose. Please see above.

Best Regards.

[FD_aurix]

ah.. Thanks. Now is more clear!