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AURIX™ Forum Discussions

Euan_Andrew
Level 1
Level 1
5 sign-ins First solution authored First reply posted

Hi all,

I am a newcomer to the Aurix family and to this forum but I have experience in motor control using other microcontrollers. I am working on a fairly typical motor control project and want to use a SAK-TC366DP-64F300S AA to simultaneously sample three phase currents and a DC link voltage during a PWM timer-zero and generate 6 PWM outputs.

I am a bit overwhelmed at this stage with the nomenclature of the ADC modules, for example "kernels", "queues", "groups", "channels", "blocks", "modules" and how I would actually use these in my given application. There are a few questions that would aid my understanding to begin with:

  1. The TX36xx family block diagram, Fig. 5 of the User Manual shows one EVADC block connected to the SPB.  Can the EVADC module be configured from both CPU0 or CPU1? Can both cores read any ADC result?
  2. This block includes Primary, Secondary and FCOMP. My understanding is that these are the three "clusters". Is this correct? There are also numbers below the cluster names, Primary (0-3), Secondary (0-1) and FCOMP (0-1). Are these the numbers of physical ADC kernels that the cluster contains, thereby defining the number of physical conversions that could be performed simultaneously?
  3. In Fig. 240 of the User Manual, the ADC kernel is shown. Above that,  primary and secondary "groups" are described. What is the difference between a "kernel" a "group" and a "cluster"? 

Thanks for any help you can provide in understanding the ADC.

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1 Solution
Euan_Andrew
Level 1
Level 1
5 sign-ins First solution authored First reply posted

Many thanks for your reply KB. I am sure there will be more questions in future but this was helpful for now.

View solution in original post

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2 Replies
KB
Moderator
Moderator
Moderator
10 solutions authored 50 sign-ins 25 replies posted

Hi Euan_Andrew,

Welcome to AURIX family !!


There are two ADC types based on underlying analog to digital converter principle,

EVADC - Uses SAR principle to convert the analog values.
ESADC- Uses Sigma-Delta principle to convert the signals.

Please find information related to EVADC below:

ADC Kernel: analog channel input multiplexer, request sources, converter together build an Adc Kernel.

ADC Cluster: There are 3 different clusters.
Primary cluster consists of ADC groups having 8 channel input multiplexers.
Secondary cluster consists of ADC groups having 16 channel input multiplexers.
Fast Compare cluster consists of dedicated channels to provide fast comparison output with respect to reference values.

In your case since you are using TC36x device,
The primary cluster has 4 groups. Each group has 8 input channels and each group has its on dedicated SAR converter.
Similarly there are 2 groups in secondary clusters, main difference is that each group in secondary cluster has 16 input channels.
There are 2 fast compare channels.

"This block includes Primary, Secondary and FCOMP. My understanding is that these are the three "clusters". Is this correct?
There are also numbers below the cluster names, Primary (0-3), Secondary (0-1) and FCOMP (0-1). Are these the numbers of physical ADC kernels that the cluster contains,
thereby defining the number of physical conversions that could be performed simultaneously?"

In short yes, your understanding is correct.

Since EVADC is connected to SPB bus, you can configure it from any CPUs and you can also restrict access to particular CPU by configuring access enable registers of EVADC.


Regards,
KB

 

 

 

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Euan_Andrew
Level 1
Level 1
5 sign-ins First solution authored First reply posted

Many thanks for your reply KB. I am sure there will be more questions in future but this was helpful for now.

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