ESR1 edge is not generating a NMI Trap

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User17612
Level 4
Level 4
First like received
Hi,

I want to generate an NMI trap on a falling edge at the ESR1 pin (ESRCFG1.EDCON = 2), but the trap doesn’t occur. Does something else need to be set to get an NMI from ESR1?

Thank you for your help.

Lucas


#8042000 12511
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User18237
Level 5
Level 5
First solution authored First like received
Hi Lucas,

The NMI trap generation has a Disable Register (TRAPDIS). The reset value of this register is 0xFFFF which means the SMU ESR0 and ESR1 Traps are disabled out of reset.
In order to allow an NMI Trap for ESR1 clear the TRAPDIS.ESR1T bit (=0).

Best regards

Mr. AURIX™
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