Dual I/O SPI Mode using Aurix 1G QSPI Peripheral for interafacing Serial NOR Flash

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User9635
Level 4
Level 4
50 replies posted 50 questions asked 25 replies posted
Hello Support,

For Aurix 1G QSPI Peripheral, is it possible to use as Dual I/O SPI Mode for interfacing with Serial NOR Flash Slave devices?
If yes, can you please provide me some lead regarding the Register Bit settings which will make QSPI behave as Dual I/O SPI Master controller.
Initially the Command from Master to Slave happens using Legacy Single SPI Mode. But then Slave and Master switches to Dual I/O Mode of SPI.
I am attaching some snippets from public links to explain Dual I/O SPI Protocol so that you can better understand the requirements.

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https://www.macronix.com/Lists/ApplicationNote/Attachments/1899/AN0251V1%20-%20Macronix%20Serial%20F...

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https://www.winbond.com/resource-files/w25q32jw%20spi%20revf%2009042018.pdf

Best Regards
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4 Replies
cwunder
Employee
Employee
5 likes given 50 likes received 50 solutions authored
baexps_pr1 wrote:
For Aurix 1G QSPI Peripheral, is it possible to use as Dual I/O SPI Mode for interfacing with Serial NOR Flash Slave devices?

No, the QSPI on AURIX is a traditional SPI implementation with dedicated data bits. One for each direction (MTSR and MRST).
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NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
True, but you could get clever with a DMA transaction set:

Send 3B and the 24-bit address over QSPI
Flip the MTSR port to an input by setting Px_IOCRn = 0xxxxb
Clock in the remaining data bytes
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User9635
Level 4
Level 4
50 replies posted 50 questions asked 25 replies posted
Hello Support,

If I change the MTSR Pin as Input, will it work because the Shift Register on the QSPI side is only connected to MRST Pin I suppose.
Or that Shift Register as shown in the picture below from TC27x User Manual version 1.3, has Shift Register which can collect both MTSR and MRST pins simultaneously and order them accordingly?
Please confirm with some more details with respect to this picture below if the Shift Register will work, because I am assuming it is not the design intent by AURIX designers to change the MTSR pin as Input Mode during SPI communication.
4212.attach

Best Regards
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NeMa_4793301
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
If you change MTSR to an input, there's no change from the QSPI peripheral's point of view - it is still transmitting data. It's just that it's no longer connected to the output port.
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