Does a module have two interrupts which share the same TOS?

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JGPark
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Hi,

I recently set two interrupts in STM, IR0 and IR1. I set TOS to CPU0 for the two of them.

In this case, trap was raised which was bus error.

 

In this case, could certain module, two interrupts share the same resource(the same TOS)?

I changed second interrupt's TOS to CPU1 then there was no issue.

 

 

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Meet_T
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Hi @JGPark ,

 

Yes your understanding is correct. 2nd Argument in the MACRO and TOS has to point to the same CPU. You simply have to provide CPU number to provide service in the 2nd Argument.

 

Best Regards,

Meet.

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Meet_T
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Hi @JGPark ,

 

You can set TOS as CPU0 for both of them there is no such restriction. Please make sure that you have mapped it correctly using the IFX_INTERRUPT Macro. Meaning for CPU0 as TOS the second argument to be passed on this macro should be 0 (i.e. IFX_INTERRUPT(isr, 0, priority) ) , if you have passed 1 then it might have caused the trap.

 

Best Regards,

Meet.

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JGPark
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Hi Meet.

Thank you for your reply.

So, TOS and VectorTablenumber has to point the same CPU. Am I right?

This is because TOS is set which CPU to provide the service and this information has to be the same with the information registered for the interrupts.

 

TOS is type of service such as CPU and DMA... and vector table number does not mean interrupt information (such as address) and its number but simply CPU number to provide a service? 

Thank you.

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Meet_T
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100 solutions authored 25 likes received 50 solutions authored

Hi @JGPark ,

 

Yes your understanding is correct. 2nd Argument in the MACRO and TOS has to point to the same CPU. You simply have to provide CPU number to provide service in the 2nd Argument.

 

Best Regards,

Meet.

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JGPark
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So basically Vector Table Number [0...2] means,

Vector Table Number 0: CPU0's vector table number

Vector Table number 1: ....

...

and interrupts are registered by TOS for each Vector Table 0..2?

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shoeofpickle
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5 replies posted First reply posted Welcome!

No, a module typically does not have two interrupts that share the same TOS (Table of Contents). The TOS is a crucial data structure in the Interrupt Service Routine (ISR) handling, ensuring that each interrupt request is properly identified and directed to the appropriate handler. Having two interrupts sharing the same TOS would likely cause conflicts and disrupt the proper functioning of the system. It's like having two identical grey double duvet covers for a single bed – unnecessary duplication that leads to confusion and inefficiency.

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Hi, 

I succeeded in with below snippet.

Two interrupts in IR0 and IR1 each, using the same TOS (CPU0)

IFX_INTERRUPT(isrSTM, 0, STM_PRIO_LED_INTERRUPT);
IFX_INTERRUPT(isr1ms, 0, STM_PRIO_1MS_INTERRUPT);

void InitStm(void)
{
    IfxStm_initCompareConfig(&StmComConfig_LED);
    StmComConfig_LED.triggerPriority = STM_PRIO_LED_INTERRUPT;
    StmComConfig_LED.typeOfService = IfxSrc_Tos_cpu0;
    StmComConfig_LED.ticks = g_ticks500ms;
    IfxStm_initCompare(STM, &StmComConfig_LED);

    IfxStm_initCompareConfig(&StmComConfig_1ms);
    StmComConfig_1ms.comparator = IfxStm_Comparator_1;
    StmComConfig_1ms.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
    StmComConfig_1ms.triggerPriority = STM_PRIO_1MS_INTERRUPT;
    StmComConfig_1ms.typeOfService = IfxSrc_Tos_cpu0;
    StmComConfig_1ms.ticks = g_ticks1ms;
    IfxStm_initCompare(STM, &StmComConfig_1ms);

}

 

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Methsonw
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First reply posted Welcome!

.

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