Dflash EEPROM

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User20254
Level 2
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1. What is the advantage of using single ended mode(sector size 4KB) and complement sensing mode(sector size 2KB)?
2. Is it necessary to implement robust emulation algorithm for gaining dflash endurance as mentioned in TC3xx?
3.There are parameters like erase verify time per page and per sector?Does it mean page-wise erase is also possible in Dflash eeprom (may be that will reduce flash endurance)?
4. Is there any registers available to check the current no: of erase/program cycles used(In datasheet parameter NE_EEP10C for no: of erase operations on DF0 per eeprom sector)?

Could someone help in solving the above queries?
Thank you.
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NeMa_4793301
Level 6
Level 6
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#1: Complement sensing mode increases the endurance of data flash: see "number of erase operations" and "flash endurance" in the datasheet.

#2: Yes, the robust algorithm requirements still apply to single-ended sensing and complement sensing.

#3: Erase timing does not change. The minimum erase size is still a sector.

#4: No, there is no count of erase/program cycles for DFLASH maintained in hardware.
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User20254
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Thank you @UC_wrangler for quick response.

May I know if there are any disadvantages using complement sensing mode?I could understand that complement sensing mode is one of the major change introduced in TC3xx compared to TC2xx.
I am curious to know more about this mode.

I have a requirement to store warning and shutdown events: 64 entries of an event (say Voltage event).There are "n" no: of events (say 10 events) where 64 entries(each entry 16 bytes ie 2 pages)
of each needs to be logged. After 64 entries, it is recommended to erase and update it with next 64 entries.So If I assign each sector for each event in complement sensing mode, will it be helpful
to increase flash endurance or May I know any suggestions for implementing it in an effective way?

Thank you !!!
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NeMa_4793301
Level 6
Level 6
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The disadvantage is that you have half as much DFLASH 😛

I haven't seen an application yet that needed the extra endurance, but your mileage may vary. That's one reason that Infineon's MCAL FEE and FLS drivers have not been validated with complement sensing active.

If you're not using Infineon's FEE/FLS, pay special attention to the erase disturb limit in the datasheet. That means it's not possible to leave some parts of DFLASH static, while looping through erase/program cycles elsewhere in DFLASH.

Every application should adhere to the guidelines in 6.2.3.2.2 Robust EEPROM Emulation, and pay special attention to the erase disturb guideline in 6.2.3.3 Data Flash Bank DFLASH0:
All sectors must be used round-robin in order to prevent the accumulation of erase disturbs in static sectors.
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User20254
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Thankyou @UC_wrangler.

We are not using Infineon's FLS and FEE driver as per current scope of requirement.

Please confirm the below understanding.
Wordline for dflash is 256 bytes in complement sensing mode .As per the robust eeprom algorithm, programming each page requires the complete wordline to be saved to SRAM.
If the comparison fails between SRAM data and the wordline containing programmed page, then save it into different wordline.
This process can be repeated for maximum of 3 wordlines. Am I correct?

Is it better to store 256 bytes at a time instead of storing 16 bytes immediately after an event is occurred?
May I know how to configure the sectors in complement sensing mode through software? It is noticed that there are DF0 User mode control Registers (sec 6.5.3.2.5 Data Flash Bank 0 Mode Control
Registers) for configuring the mode. Is it only applicable for User Configuration Block(UCB) or eeprom also uses the same register? Please confirm.

Thankyou in Advance.
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Darren_Galpin
Employee
Employee
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The complement sensing mode is for eeprom as well - the UCBs are considered to be part of the DF0 range.
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Darren_Galpin
Employee
Employee
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And the user register can only be set by programming the UCB with the value and reading it in during boot.
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User20254
Level 2
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Thankyou @Darren Galpin

Sorry I am still not clear about configuring sectors in complement sensing mode. Is it like by default ,sectors will be configured in single sensing mode?
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User20254
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In TC37x datasheet, complement sensing mode and single sensing mode have been addressed for dflash sectors.

We are using one of the variant of TC37x( SAL TC377TP-96F300S), It is mentioned as Data Flash0 single ended as 256KB and there are no traces of complement sensing mode defined.
Does it mean this variant only supports single sensing mode?

Kindly help me to resolve the above query.
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NeMa_4793301
Level 6
Level 6
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The default for DFLASH is single-ended. If you want to change that, you need to change HF_PROCONUSR.MODE to complement sensing - see page 466 of AURIXTC3XX_um_part1_v1.5.pdf.

To do that, you need to change UCB_DFLASH_ORIG and UCB_DFLASH_COPY - see page 566.

That in turn means that you need to set 0xAF402200 from 0x00000000 to 0x00000001, and 0xAF403200 to 0x00000001 (see page 560).

Be very careful when changing UCBs - if you erase one and then reset the AURIX, the device is not recoverable. You also need to ensure that the confirmation word does not get erased - you can leave it at the default unlocked value (0x43211234).
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User20254
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Thankyou for the clarification.:o
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