I have a question regarding Data Flash erase disturb limit. In KBA234714 (AURIX™ MCU: Data Flash erase disturb limit paramet... - Infineon Developer Community) it is mentioned that more than 50 erase cycles on a dflash sector may cause disturbances in neighbouring cells. However, it is not explained what is meant by neighbouring cells.
For example if 100 erase cycles are performed on dflash sector 3, does this mean disturbances may appear in dflash sector 2 and sector 4, or can disturbances appear in any dflash sector?
From my understanding, the neighbouring cells are meaning to word-line which is a group of 512 bytes in DFLASH and PFLASH. So using Robust EEPROM Emulation algorithm can keep the reliability of the stored data.
If I understand you correctly this means, only neighbouring word lines of the erased sector are affected by disturbances. So for example if sector 3 is erased 100 times this means disturbance will only appear in the last word-line of sector 2 and the first word-line of sector 4?
So if I want to store 2 regions to dflash, one with static data and one with dynamic data, if I leave an empty sector between the two regions, this should protect against disturbances appearing in the static data?
Hi Jakob, I think the one word-line is only be impacted internally, that means programming or erasing into the one word-line only limited to that one only. The broken is also limited to the one word-line only. The neighboring is only for cells in one word-line from my understanding.
The erase disturb effect applies throughout DF0. Leaving a gap in sectors between a static and a dynamic area is not enough to protect against erase disturb effects.
Wordline failures is a different problem; a robust EEPROM algorithm will both avoid the erase disturb effect and detect / skip wordline failures (usually just one or two, to keep things simple).