AURIX™ Forum Discussions

[User7559]

I want to use the Data Access Overlay(OVC) function with TC233.

Can you provide material or example source for this function?

[NeMa_4793301]

Here is a little example of overlay. I wrote it for a TC27x, so it's using OVC2 (CPU2 overlay registers) instead of OVC0, and it remaps PFLASH access to LMU RAM, so you'll need to adapt the addresses to your use case.

/*****************************************************
 *
 * TC27x_overlay.c
 *
 * Description : Demo of overlay memory
 *
 */

#include 

typedef unsigned long U32;

#pragma align 32
const U32 Test_Map_Cal_Flash[32] = {0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,0,1};
#pragma align restore

#pragma align 32
volatile U32 Test_Map_Cal_Ram[32] = {9,19,29,93,49,59,96,79,98,99,90,91,92,93,94,95,96,97,98,99,90,91,92,93,94,95,96,97,98,99,90,91};
#pragma align restore

U32 *lmu_ptr;

#pragma align 32
volatile U32 Test_Algo_Update[32];
#pragma align restore

OVC0_RABR0_type rabr =
{
		.B.OMEM=6,		// Overlay Memory Select: Redirection to Core 2 DSPR !*!*!* make sure that's true!
		.B.OVEN=1		// Overlay enabled
};

OVC0_OTAR0_type otar;

const OVC0_OMASK0_type omask =
{
//		.B.OMASK = 0xFFF	// Overlay Address Mask: 32 byte block size
		.B.OMASK = 0xE00	// Overlay Address Mask: 1024 byte block size
};

const OVC0_OSEL_type osel =
{
		.B.SHOVEN0 = 1		// Shadow Overlay Enable 0: overlay block 0 is enabled
};

const SCU_OVCENABLE_type ovcenable =
{
		.B.OVEN2 = 1		// Overlay Enable 0: OVC is enabled on CPU2
};

const SCU_OVCCON_type ovccon =
{
		.B.CSEL2 = 1,		// CPU Select 0
		.B.OVSTRT = 1,		// Overlay Start
		.B.DCINVAL = 1,		// Data Cache Invalidate
		.B.OVCONF = 1		// Overlay Configured
};

int main(void)
{
	for( ;; )
	{
	}
}

int main2(void)
{
	int i;

	lmu_ptr = (U32 *) 0xB0004000;
	for( i=0; i<31; i++ )
	{
		lmu_ptr = Test_Map_Cal_Ram;
	}


	// Configure the details for overlay memory
	// - remap Test_Map_Cal_Flash reads into Test_Map_Cal_Ram
	// - this is making gross assumptions that Test_Map_Cal_Ram is in CPU2's DSPR
	//
	_endinit_clear();
	rabr.B.OBASE = ( (unsigned long) (lmu_ptr) >> 5) & 0x1FFFF;
	OVC2_RABR0.U = rabr.U;
	otar.B.TBASE= ( (unsigned long) (&Test_Map_Cal_Flash) >> 5) & 0x7FFFF;
	OVC2_OTAR0.U = otar.U;
	OVC2_OMASK0.U = omask.U;
	OVC2_OSEL.U = osel.U;
	_endinit_set();

	_safety_endinit_clear();
	SCU_OVCENABLE.U = ovcenable.U;
	_safety_endinit_set();

	SCU_OVCCON.U = ovccon.U;					// Turn on overlay memory

	__dsync();

	// Now copy Test_Map_Cal_Flash into Test_Algo_Update
	// - CPU0 reads from Test_Map_Cal_Flash will instead read from Test_Map_Cal_Ram
	// - note that the debugger bypasses the overlay system, so it can't be fooled
	//
	for( i=0; i<31; i++ )
	{
		Test_Algo_Update = Test_Map_Cal_Flash;
	}

	for( ;; )
	{
	}
}

[User22480]

Hi, UC_wrangler.

Thanks for sharing on the Overlay sample code, I tested it works, but somehow it is kind of "overlay RAM is updated once" only.
Basically, I just want to have a live overlay RAM update, so I put the Test_Algo_Update in the infinite loop (see code below).

But somehow, after Test_Algo_Update[] is updated, then I go and update the 0xB0004000 in Lauterbach debugger, but I don't see Test_Algo_Update[] is updated.... Why?
Any idea?

int main2(void)
{
:
:


for( ;; )
{
for( i=0; i<31; i++ )
{
Test_Algo_Update = Test_Map_Cal_Flash;
}
}
}

Thanks and regards,
William.

[NeMa_4793301]

Overlay is a per-CPU feature; when you view a debugger window, it doesn't include overlay.

In Lauterbach, try doing SYStem.Option OVC ON, to force the debugger to use the CPU's point of view.

[NXTY_Ota]

I could not make OVC executed on TC39x by simply copying the code described in this topic, so I created a PJ that executes OVC the TC39x using AURIX™ Development Studio and have attached it.

To make it executed on other than TC39x, please copy Cpu0_Main.c, Cpu2_Main.c, and Cpu2_Main.h to a PJ of the family you would like to make OVC executed on.