- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
In TC377, what's the problem with DMA and CPU access a same SRAM at the same time? For example, during CPU reading a variable DMA moves a data to the variable, or during DMA moving a data to a variable CPU reads it, what will happend in this case?
Solved! Go to Solution.
- Labels:
-
AURIX
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
There is no problem. DMA and CPU don't access at the same time the SRAM (this not a dual port ram). If one of them access the SRAM then the other wait for access from other finished and access then the SRAM.
For your example: If CPU reading a variable when DMA moves a data to the variable, then the CPU will read the old value or the new value dependent which access was earlier.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
There is no problem. DMA and CPU don't access at the same time the SRAM (this not a dual port ram). If one of them access the SRAM then the other wait for access from other finished and access then the SRAM.
For your example: If CPU reading a variable when DMA moves a data to the variable, then the CPU will read the old value or the new value dependent which access was earlier.