Confused with TC234's memory map PFLASH address range

[User21797]

Hi there,

I am confused with the memory map description in TC23x manual (V1.1) Table4-2. Why is there 2 address range for PFLASH? One in segment 8 address range 0x8000000 - 0x801FFFFF,

the other segment 10 0xA000000 - A01FFFFF,

To my understanding all TC23x only have one 2MB PFLASH right? Then why is there two 2MB PFLASH on memory map?

[ugo_8a · Accepted solution]

HI,

Address 0x80000000 is the cache segment , CPU instructions  will pass trough the cache (is not enabled by default, but most of the cstart implementations will turn on the cache) 

address 0xA0000000 is the un-cache segment, here the cache will by bypassed.