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AhmedSaber
Level 2
Level 2
First like received First solution authored 10 replies posted

Hi

I'm using the AURIX TC387 target with the 4 cores, core0 as the master. Core1,2,3 as slave cores

I need to set the whole controller" system" into low power mode "sleep"

As per the AURIX TC3xx UM, we can trigger the system low mode in two ways:

1. To configure each core to trigger the system low power mode, slaves are to enter the mode first then last the Master.

2. Or to configure the Master core only to trigger the low power mode

I'm configuring for the second approach with the CPU0 as the master core

So in the application, I did the following in order:

1. SCU_PMSWCR1.CPUSEL = 0x01                                // the authorized core to trigger the system low power mode

2. PMTRCSR0.LPSLPEN=0x01                                        // to put the EVRC in low power mode within the sleep mode

3. PMCSR0.REQSLP=0X02             // Request sleep mode for the system

The problem is,

I still see the CPUs are executing the SW, which means the CPUs didn't reach the sleep mode indeed.
from the debugger, I see the req sleep is oscillating between Run, System Sleep, and the current CPU status oscillates between Normal, Sleep Requested

Screenshot1 shows the CPU status and the sleep request status

1.JPG

Screenshot1 shows the CPU status and the sleep request status"Different from the above"

2.JPG

 My question is,

What I'm missing here?/Is there some limitations or pre-requisite to reach the sleep mode?

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1 Solution
Yuva
Moderator
Moderator
Moderator
250 replies posted 250 sign-ins 100 solutions authored

Hello,

Please check the following points.
1. You need to do an endinit operation before writing to the register, is this done? CPU ENDINIT bit has to be set back after REQSLP is written for the mode transition to take place. In the case of Safety ENDINIT, the mode transition will be issued immediately and does not wait till Safety ENDINIT is set back to 1 again.
2. Are there any wakeup events (interrupt, NMI, traps) after the device enters SLEEP mode?

Thanks.

View solution in original post

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5 Replies
Yuva
Moderator
Moderator
Moderator
250 replies posted 250 sign-ins 100 solutions authored

Hello,

I request you to contact your local sales or PDH for this topic as we don't discuss topics related to licensed products like MCAL in the community. Also please don't post images and code from the licensed products in open community.

Thanks.

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AhmedSaber
Level 2
Level 2
First like received First solution authored 10 replies posted

Hi Yuva,

Thanks a lot for your directions
Now I have edited the question. Could you please clarify your answer so far

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AhmedSaber
Level 2
Level 2
First like received First solution authored 10 replies posted

Kindly Reminder

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AhmedSaber
Level 2
Level 2
First like received First solution authored 10 replies posted

Kind reminder

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Yuva
Moderator
Moderator
Moderator
250 replies posted 250 sign-ins 100 solutions authored

Hello,

Please check the following points.
1. You need to do an endinit operation before writing to the register, is this done? CPU ENDINIT bit has to be set back after REQSLP is written for the mode transition to take place. In the case of Safety ENDINIT, the mode transition will be issued immediately and does not wait till Safety ENDINIT is set back to 1 again.
2. Are there any wakeup events (interrupt, NMI, traps) after the device enters SLEEP mode?

Thanks.

0 Likes