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User17897
Level 2
Level 2
I tested my func on PSRAM and Flash to evaluate the difference between psram and flash.
I used the default .lsl file, called "Lcf_Gnuc.lsl".
For example, my func called "holo_fx_test"

for PSRAM test, as following:
#pragma section ".cpu0_psram" x
void holo_fx_test()
{
....
}
#pragma section
and then, the .map file like that:
0x7010031c 0x7010031f xxxx g holo_fx_test psram0 .CPU0.psram_text .cpu0_psram 2_Out/Gnuc/0_Src/0_AppSw/Tricore/Main/holofixmath.o
So, I think my modification has worked! because the .map file changed.

for Flash test, I removed above "#pragma section \".cpu0_psram\" x" and "#pragma section"
and then, the .map file like that:
0x80001296 0x80001299 xxxx g holo_fx_test pfls0 .text .text 2_Out/Gnuc/0_Src/0_AppSw/Tricore/Main/holofixmath.o

At the end, I found the performance on PSRAM is almost the same as Flash.
for example,
the cyclecnt of running on PSRAM is 100000
the cyclecnt of running on Flash is 100000
Why? I want to know the detail.
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4 Replies
User13290
Level 5
Level 5
First solution authored

Hi Shaquille,

You located holo_fx_test() into a cached memory region of the flash. That's probably the reason, although if my memory isn't failing me, the cache needs to be explicitly enabled. If you want to compare against a truly non-cached application you'll need to locate it into the non-cached region instead.

Here's a tiny example of the memory definitions that you'll need (memory ranges are randomly chosen in my case):


MEMORY {
cached_flash0 (rx) : org = 0x80000000, len = 2M
non_cached_flash0 (rx) : org = 0xa0000000, len = 2M
}

REGION_MIRROR("cached_flash0", "non_cached_flash0")


Next you can proceed to locate your code in non_cached_flash0 to make a real comparison between non-flashed RAM and PSRAM.

Best regards,

Henk-Piet Glas

Principal Technical Specialist
Embedded Software

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User17897
Level 2
Level 2
Dear Glas:
Thank you, I've tried your solution, it can work!
I have some questions:
1. first question, how to config the math.lib(including sinf, cosf, sqrt,etc.) to an cached flash, if I config the .text into non_cached_flash?
the lib of system implemation, how to config?Would you like to tell me?

2.second question, the compiler always tell me the warning as following:
warning: 1.incompatible section flags 2_Out/Gnuc/0_Src/0_AppSw/Tricore/Main/holofixmath.o:
input section'.cpu0_psram' = 'axl'
output section '.CPU0.psram_text' ='axwc0'
my "Lcf_Gnuc.lsl" in the attachment(I changed the ext-name as ".txt"),
and my c code like this:
#pragma section ".cpu0_psram" x
void holo_fx_test()
{
....
}
#pragma section

Would you like to tell me how to eliminate this warning?

3.the last question, how to config code section in multicores(such as 3 cores)
I found the .map file can changed after apply this code: #pragma section ".cpuX_psram" x (such as cpu0_psram)
I found the .map file cannot changed(always 0x8xxxxxxx), if the code like this: #pragma section ".psram_text" x
So, I think it can worked if I just run 1 core.
And then, how and what to do, If I want to run "holo_fx_test" on 3 cores?

3 questions in total, would you like to tell me?
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User13290
Level 5
Level 5
First solution authored

Hi Shaquille,

For question 1 are you saying that part of your application (the maths) is going into flashed memory and another path in non-cached memory? And that you are currently unable to distinguish between them, because they have the same default section name?

For question 2 you will need to add the core attribute to the attribute list, like so.


#pragma section ".cpu0_pspram" wxc0

void holo_fx_test(void) {
/* whatever */
}

#pragma section


This should make the warning go away, as there no longer is a mismatch. Note that I also added the w attribute because you are locating this section into RAM memory. This implies that you must make sure to add a copy section to .rodata of Lcf_Gnuc.txt. More specifically .CPU0.psram_text needs to be added to this copy table. I just checked in your upload and this is already the case.

Concerning question 3, if you want to do multicore programming have you considered using the the multi-core examples that are available from our Content Manager? CM is available from the help menu in the HighTec IDE and offers a search interface into our online repository. Just key in your derivative, for example TC297, and it should return a number of hits, at least one of which should be a multi-core example. Note that CM is available in the most recent professional versions and also the latest free entry toolchain (v4.9.3.0-Infineon-1.0).

Beste regards

Henk-Piet Glas

Principal Technical Specialist
Embedded Software

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User17897
Level 2
Level 2
thanks for you help
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