AURIX™ Forum Discussions

[nsyed]

Can you please clarify below questions based on the figure 87 in section 10.5.1 of AURIX™ TC3xx User manual V 1.3.0.

1. Can the MUX selection of fsource0, fsource1 and fsource2 be configured separately. For example can I configure fsource0 = fPLL0 fsource1 = fBack and fsource2 = fBack ?
2. Which register has the MUX selection configuration for fsource0 ?
3. Which register has the MUX selection configuration for fsource1 ?
4. Which register has the MUX selection configuration for fsource2 ?
5. For fsource1 DIV2 can be selected and register is specified as CCUCON1.PLL1DIVDIS. I don’t see this register at all in section 10.5.1.3, is this a typo and the register is PERPLLCON0. DIVBY ?

[nsyed]

Dear Community Members,

Any thoughts on this questions ?

[cwunder]

This is my understanding:



CCUCON1.PLL1DIVDIS is bit 7 of the CCUCON1 register...

The user's manual I am referring to is AURIXTC3XX_UM_part1_v1.6.pdf

[nsyed]

Thank you so much !!! This makes sense. I have clear understanding now and its matches with MCAL settings what I am trying to configure.

I will get the new version of the User manual, my version looks like does not have this information