We use cookies and similar technologies (also from third parties) to collect your device and browser information for a better understanding on how you use our online offerings. This enables us to optimize and personalize your experience with Infineon and to provide you with additional services and information based on your individual profile. Details are available in our privacy policy.
Privacy Policyand Imprint
View and change cookie settings
Accept
Reject
Announcements

Robots are revolutionizing our lives in many ways. Join our webinar to learn about Infineon’s broad portfolio of robot building blocks.
Click here to register.

Ask the Community

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

AURIX™ Forum Discussions

User17615
Level 2
Level 2
First like received
‎Jan 20, 2020 02:46 AM
‎Jan 20, 2020 02:46 AM

Clarification of QSPI pin configuration

Hi,

I need clarification for QSPI pin configuration since in the data sheet looks like Port pins for QSPI can be MRST or MTSR. For example, P10.3 shows that it can be set to QSPI1 input and output but in both case it shows MTSR, which seems to be contradicting.

Thank you and best regards,
Tita

#8042000 19756
Subscribe
1 Reply
User18237
Level 5
Level 5
First solution authored First like received
‎Jan 20, 2020 04:26 AM
‎Jan 20, 2020 04:26 AM

Re: Clarification of QSPI pin configuration

Hi Tita,

QSPI can function as Master or Slave, depending on the mode selected, the pin configuration is as follows:
When Master mode selected:
MRSTxA to MRSTxH can be the input for the QSPIx
MTSRx is the output of the QSPIx
When Slave mode selected:
MTSRxA to MTSRxH can be the input for the QSPIx
MRSTx is the output of the QSPIx

Best regards,
Mr. AURIX™
0 Likes
This widget could not be displayed.