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AURIX™ Forum Discussions

SalinaSJames
Level 1
Level 1
First reply posted First question asked Welcome!

First question : How can I disable ECC safey error in infineon TRICORE TC39XX

I used to disable it in TC27 using this cocde:


/* Deactivate ECC safety errors */
Mcal_ResetENDINIT();
FLASH0_ECCRP0.B.ECCORDIS |= IFX_FLASH_ECCRP_ECCORDIS_MSK;
FLASH0_ECCRP1.B.ECCORDIS |= IFX_FLASH_ECCRP_ECCORDIS_MSK;
Mcal_SetENDINIT();

 

now I'm tying to disable it on TC39XX with this code DMU_HF_ECCC.B.ECCCORDIS = 0x01; but it's not working

Should I set PECENCDIS and DECENCDIS flags ?

Second question when enabling ECC, why can't I read the flash memory ? I thought it will just not use ECC checking ?

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1 Solution
MoD
Employee
Employee
250 sign-ins 25 likes received 50 solutions authored

DMU_HF_ECCC is the register for DF0. The register for PFx is inside of CPUx. As already described, e.g. for PF0 set CPU0_FLASHCON1.B.MASKUECC = 01B

For second questions, if the flash is erased and not programmed then no valid ECC information is available which result in an uncorrectable ECC error.

View solution in original post

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2 Replies
dw
Moderator
Moderator
Moderator
1000 replies posted 250 solutions authored 100 likes received

Dear salina,

Please check if Set FLASHCON1.B.MASKUECC = 01B will fix your problem.

In AURIXT3XX_um_part1_v2.0.pdf, you can find FLASHCON1 MASKUECC's description.If a local PFLASH uncorrectable ECC error occurs, then the error is globally disabled for any requesting master reading the local PFLASH.

 

dw

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MoD
Employee
Employee
250 sign-ins 25 likes received 50 solutions authored

DMU_HF_ECCC is the register for DF0. The register for PFx is inside of CPUx. As already described, e.g. for PF0 set CPU0_FLASHCON1.B.MASKUECC = 01B

For second questions, if the flash is erased and not programmed then no valid ECC information is available which result in an uncorrectable ECC error.

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