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AURIX™ Forum Discussions

abcmo123
Level 1
Level 1
5 questions asked 10 sign-ins 5 sign-ins

Dear Aurix users,

 

I have a question about ECC mechanism in TC23x device.

As far as I know, ECC can correct one bit error in data read (DSPR).

Can ECC correct one bit error in data write (DSPR)?

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dw
Moderator
Moderator
Moderator
100 likes received 750 replies posted 10 likes given

Please refer to user manual as below:

13.5.1.1 SRAM Error Detection & Correction (EDC/ECC)
All SRAMs are implemented with Error Detection or Correction Codes (ECC) for the stored Data. Except for certain
SRAMs described in the appendix chapter, the ECC is computed over the data alone.
During a WRITE operation, checksum bits (ECC bits) for the input data word are generated using an ECC encoder.
These bits are stored in the SRAM along with and additionally to the data word itself.
During a READ operation, an ECC decoder compares the read Data word + ECC bits to the expected ECC value. If
due to any random hardware failure, soft error etc., the data word stored in the SRAM was corrupted, then there
will be a mismatch compared to the expected ECC value. This is notified as an error and alarm.
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