Aurix Trap : Manual generated Traps for testing

[giriprakash]

I need to test the below traps. Can you help me simulate the traps for testing?

• StackOverflow
• Illegal Opcode
• Memory Protection Write

[Yuva · Accepted solution]

Hello,

You can refer to chapter 6 of the core architecture manual to know about different types of traps.
1. Aurix uses context save area to manage the function call, interrupts, etc. Class 3 traps occur if there is an error in context management.
2. When the instruction decoded doesn't correspond to the defined opcode.
3. When data write access is done to the memory protected region.

Thanks.

[giriprakash]

Hi,

Regarding Illegal opcode, do you have any example code or document to force the  Illegal opcode trap?. This is only for testing purposes.

Thanks 

[cwunder]

Here are some snippets for Class 2 traps

typedef void (*func_t)(void);

/*TIN:1 IOPC Synch. HW Illegal Opcode*/
/* Unused program memory filled with 0x36363636 etc will generate a IOPC (Invalid Opcode) trap if execution is attempted*/
*(volatile uint32*) (0x70101000) = 0x36363636;
__dsync();
__isync();
((func_t) 0x70101000)();

/*TIN:2 UOPC Synch. HW Unimplemented Opcode*/
/* __asm("tlbdemap d2");  */
*(volatile uint32*) (0x70101000) = 0x275;
__dsync();
__isync();
((func_t) 0x70101000)();

/*TIN:3 OPD Synch. HW Invalid Operand specification*/
/**
* 6B 0B 00 C0  PACK      d12,e0,d11
* 6B 0B 00 C1  PACK      d12,e1,d11 change the e0 to e1 to make it odd
*/
*(volatile uint32*) (0x70101000) = 0xC1000B6B;
__dsync();
__isync();
((func_t) 0x70101000)();