Aurix TC375 TE, 176 package: pin routing for Edsadc measurement

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Sven
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- how to configure the drivers to get analogue input?

- an example will help 

- should be notified in result/event register of Edsadc

- Port_PBcfg.c file is involved, as far as i understood

- CDD_Dsadc_Cfg.cfile involved too?

- did not find in the docu available

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Di_W
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dw_0-1649328279149.png

 

AN0 Pin67 - TC37xAA_DS_v1.1.pdf

dw_1-1649328328898.png

Yes, the demo code includes the pin setting of AN0. No need other setting for it. As it has potentiometer, the result could be watched in debug window. The setting is in source code which includes Libraries/iLLD /Intra /Service. 

 

\AURIX-V1.5.4-WORKSPACE\EDSADC_1_KIT_TC375_LK
├─.settings
└─Libraries
    ├─iLLD
    │  └─TC37A
    │      └─Tricore
    │          ├─
    │          ├─Edsadc
    │          │  ├─Edsadc
    │          │  └─Std

 

Above sch is in Board_Users_Manual_Aurix_lite_kit_v2_0.pdf After you access MyICP, you could download pdf. 

dw_0-1649330426826.png

In MyICP, you can get iLLD package, in which you will get .chm file as above showed for you research.

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Sven
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How to configure port routing?:
- sample leaves the part open: Line 159 in IfxEdsadc_Edsadc.c
- tutorial EDSADC_1 for KIT_AURIX_TC375_LK mentions channel 3 and port pin AN0 - i do not see it in the code implementation
- where to look in the docu for this topic?

With register GLOBRC i start EDSADC module run:
- how do i check if it is running?
- and if it is running not/properly?

EDSADC module has many setting options:
- which are the important one?
- important for basic functionality?


Thanks for your support

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Di_W
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    void IfxEdsadc_Edsadc_initChannel(IfxEdsadc_Edsadc_Channel *channel, const IfxEdsadc_Edsadc_ChannelConfig *config){
    ...
    const IfxEdsadc_Edsadc_ChannelPins *pins = config->channelPins;

    if (pins != NULL_PTR)
    {
    ...
    }
...
}

Above is for diginal.

In TC37X_ts_appx_v2.5.1.pdf  33.3.1 Analog Module Connections, You will see there are 6 channel EDS0-EDS5, which can connect Source Pins. For No.3 channel, INMUX bitfield will select AN0/AN1/AN14/AN15.

In 33.3.2 Digital Module Connections, you will see other connections which is specific for diginal.

The trigger input line is selected via bitfield TRSEL = [yyyyB], the data input line (DSDIN…) is selected via bitfield DSRCEX = [yyyB], the clock input line (DSCIN…) is selected via bitfield CSRCEX = [yyyB].

 

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Sven
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At first, where do I get the doc? NDA I do not have.

Currently using AURIX TC3xx User's Manual Part 2, version V2.0.0 2021-02

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Sven
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thanks, i emailed Aurix team & wait for access. In the meantime:
- i applied the sample register settings in my implementation
- sample EDSADC_1 for KIT_AURIX_TC375_LK
- some values (like DIVM) i set roughly - avoiding calculation
- finally i enabled GLOBFC for all 6 channels/modulators

- if i set the register mentioned above properly. would i see input results?
- would event flag and RESAx reigisters update values?
- the sample does not include particular pin settings
- please give me an example for 1 channel (176 package)
Registers mentioned above:
MODCFGx.INMUX pin position A..D mapping, where do i find
DICFGx.TRSEL which values are possible
.DSRCEX may correspond to INMUX input?
.CSRCEX if 0: internal clock, which additional setting required


I am using currently User Manual AURIX TC3xx Part 2, version V2.0.0 2021-02, public available.
If necessary, we may call.

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Di_W
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Hi sven,

please give me an example for 1 channel

The demo code of EDSADC is OK to output a result like the attached PPT showed which is using AN0 as input source.  The demo code could be a reference besides User Manual and Tech spec and datasheet etc.  The pin setting is not so obvious however for anolog input AN0, it's fine. 

https://github.com/Infineon/AURIX_code_examples/tree/master/code_examples/EDSADC_1_KIT_TC375_LK

https://www.infineon.com/dgdl/Infineon-EDSADC_1_KIT_TC375_LK-Training-v01_00-EN.pdf?fileId=5546d4627...

dw_0-1649243277793.png

dw

 

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Sven
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i downloaded previously the sample. Where do i find the AN0 setting?
Reviewing IfxEdsadc_Edsadc.c file:
- channel pins are set to Null pointer: .channelPins = NULL_PTR,
- in function IfxEdsadc_Edsadc_initChannelConfig

Pin setting is not so obvious:
- you mean the one mentioned above or in general?
- for this i have the user manual AURIX TC3xx Part 2, version V2.0.0 2021-02 and Data Sheet V 1.1, 2021-03 - publicly available

Is the sample easy to compile/run?
- some colleague reported compile issues

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Di_W
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    .inputPin               = IfxEdsadc_InputPin_a,


...

  edsadcChannelConfig.channelId = (IfxEdsadc_ChannelId)AN0_CH3;  

 

Sorry the relation is not so obvious, but it should work. Above two lines is just a tip for you there is some settings inside the source.

Please download ADS to compile. The chips maybe differ from demo code, probably needs some modification.

https://www.infineon.com/cms/en/product/promopages/aurix-development-studio/

I am using ADS1.5.4 and after installation, you can import from the menu and select EDSADC_1_KIT_TC375_LK demo code. Below is my screenshot for your reference.

dw_0-1649248113580.pngdw_1-1649248136861.png

 

Note that ADS is using FREE toolset and compiler with UDE debugger, the tool chain is free and suitable for demo code. For commercial application, you could select other commercial development tools.

 

 

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Sven
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thanks, if i complement my implementation with the info:
- .inputPin = IfxEdsadc_InputPin_a and edsadcChannelConfig.channelId = (IfxEdsadc_ChannelId)AN0_CH3
- registers were set according to the sample already
- i will check again the registers MODCFGx and DICFGx
- and start module run via GLOBRC register (for all channels and modulators)
- channel3 RESAx and event flag registers should be updating?
- is there additional external voltage input required? No potentiometer on my board.
- appropriate pin/s should not be in pull up/down mode

Or would you rather recommend sample run first. My screenshot has less folders, probably added at build time:

Sven_0-1649251801982.png

 

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Di_W
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Hi Sven,

After you install ADS, you could select Import from the menu File, the demo project will display as below, you can use UDE(installed with ADS) to debug .elf file which is after build. Then you can Debug the register accordingly. As your board has no potentiometer, you can give external volatge input, or the result would be not decisive. About the register setting, you could check the C code, and list all the register setting inside the source code as the configuration is not as obvious as assembly language.

dw_0-1649296100860.png

dw

 

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Sven
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thanks, additional question:
- does Infineon file Port_PBcfg.c (apart of the sample) need to be modified manually?
setting port pin to PORT_INPUT_NO_PULL
setting port pin to PORT_PIN_ANALOG_INPUT_ENABLE
- or it is done by upper application
- To which port  AN0/Channel3 is related?  Available ports: 0, 40, 33, 32, 23-20, 15-13, 11, 10

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Di_W
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dw_0-1649328279149.png

 

AN0 Pin67 - TC37xAA_DS_v1.1.pdf

dw_1-1649328328898.png

Yes, the demo code includes the pin setting of AN0. No need other setting for it. As it has potentiometer, the result could be watched in debug window. The setting is in source code which includes Libraries/iLLD /Intra /Service. 

 

\AURIX-V1.5.4-WORKSPACE\EDSADC_1_KIT_TC375_LK
├─.settings
└─Libraries
    ├─iLLD
    │  └─TC37A
    │      └─Tricore
    │          ├─
    │          ├─Edsadc
    │          │  ├─Edsadc
    │          │  └─Std

 

Above sch is in Board_Users_Manual_Aurix_lite_kit_v2_0.pdf After you access MyICP, you could download pdf. 

dw_0-1649330426826.png

In MyICP, you can get iLLD package, in which you will get .chm file as above showed for you research.

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