AURIX™ Forum Discussions

[abcmo123]

Dear Aurix users,

I want to ask my understanding about CPU memory protection and CPU Bus memory protection in TC23x device.

CPU Bus memory protection mainly protect the SRAM on SRI bus. It probably protect the unintended write option from  DMA.

CPU memory protection protect the whole address that CPU can access, but it can not protect the unintended write option from DMA. That is why we need the CPU Bus memory protection right?

[Jeremy_Zhou]

Hi @abcmo123 ,
Thank you for your interest in Infineon Semiconductor products and for the opportunity to serve you.
Yes, your understanding is right.
BR，
Jeremy

[abcmo123]

Dear Jeremy_Zhou,

Thank you for your reply.

I want to make a further confirmation to check if the register setting process is correct.

As the user manual say. CPU bus memory protection can protect PSPR and DSPR.

For example, If I want to protection DSPR(0x70000000 - 0x70015FFF) from unintended write by DMA, so I have to set the register as following.

SPROT_RGNLA0.U = 70000000

SPROT_RGNUA0.U = 70015FFF

SPROT_RGNACCEN.U = (according to the TAG number in user manual)

[Jeremy_Zhou]

Hi @abcmo123 ,

Yes, the register setting is right.

BR,

Jeremy