AURIX™ Forum Discussions

[User19909]

In the user manual EMEM chapter:
- The EMEM Core registers shall be accessed via the BBB fc BPI SFF. The register description shows the maximum
configuration. The number of active control and status bits shall depend on the EMEM configuration.

how is the accessing via BBB fc BPI SFF? what is that?
because when I try to access the EMEM_CLC for example directly by just disabling the end init protection Alarm7[21] is reported once I access any of the emem core registers directly.

[NeMa_4793301]

Did you unlock EMEM per EMEM 23.3.2.3 Changing the EMEM Mode?

    /* 1st step - EMEM Module / EMEM clock enable */
    uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
    IfxScuWdt_clearCpuEndinit(passwd);
    EMEM_CLC.U = 0x0U;
    IfxScuWdt_setCpuEndinit(passwd);

    /* 2nd step - Unlocking the EMEM module using magic numbers
     * We need to write the following three values (0b001, 0b011, and 0b111)
     * in order in the STBULK field of the EMEM_SBRCTR to unlock the module.
     * Details are in tc29xB_um_v1.3.pdf, page: 5763
    */
    EMEM_SBRCTR.U = 0x2U;
    EMEM_SBRCTR.U = 0x6U;
    EMEM_SBRCTR.U = 0xEU;

And even more important - are you sure your device has EMEM?

[User19909]

Yes my device has EMEM, i am using TC37xEXT which has EMEM yes.
-yes i unlocked the cpuendinit before accessing emem_clc, however in my target specific document tc37xEXT cant find anything about magical numbers or unlocking the module.
only thing i found is what I mentioned above in the user manual it mentions that The EMEM Core registers shall be accessed via the BBB fc BPI SFF. The register description shows the maximum
configuration. The number of active control and status bits shall depend on the EMEM configuration..

[NeMa_4793301]

It's not in the target specific document. See AURIXTC3XX_um_part1_v1.5.pdf, page 2014, 23.3.2.3. Same sequence as in the code above.

[Darren_Galpin]

BBB=Back Bone Bus, which connects the ADAS peripherals, EMEM and IOC32, and runs on the FPI protocol. The BPI is the Bus Peripheral Interface, and internal block to the IP which decodes the incoming transactions per register and allows access or gives a protection error. SFF I would assume would be safety flip flops, and would be used to guarantee safe access.

The EMEM_CLC register is also protected by the ACCEN register, hence it would depend on what that was set to and the tag of the master you were using to access the EMEM. If the tag is not allowed, then you would get all write accesses to that register erroring.

[User19909]

Darren Galpin wrote:
BBB=Back Bone Bus, which connects the ADAS peripherals, EMEM and IOC32, and runs on the FPI protocol. The BPI is the Bus Peripheral Interface, and internal block to the IP which decodes the incoming transactions per register and allows access or gives a protection error. SFF I would assume would be safety flip flops, and would be used to guarantee safe access.

The EMEM_CLC register is also protected by the ACCEN register, hence it would depend on what that was set to and the tag of the master you were using to access the EMEM. If the tag is not allowed, then you would get all write accesses to that register erroring.

The ACCEN is allowed for CPU0 and the alarm reported is not for the ACCEN, the alarm reported ALM7[21] is a Built-in BBB Error Detection. what I do is as follows

uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
EMEM_CLC.U = 0x0U;
IfxScuWdt_setCpuEndinit(passwd);

/* 2nd step - Unlocking the EMEM module using magic numbers
* We need to write the following three values (0b001, 0b011, and 0b111)
* in order in the STBULK field of the EMEM_SBRCTR to unlock the module.
* Details are in tc29xB_um_v1.3.pdf, page: 5763
*/
EMEM_SBRCTR.U = 0x2U;
EMEM_SBRCTR.U = 0x6U;
EMEM_SBRCTR.U = 0xEU;

as UC_wrangler mentioned above I follow the same procedure in my end, the problem is once the line EMEM_CLC is executed the alarm is reported, that's why I asked if there is a problem directly accessing the register or if I am missing something

[Darren_Galpin]

Could you Iook at the error capture information in the BBB BCU so that we can find out the details of the transaction, such as opcode, supervisor mode etc? As the register is only protected by ACCEN, supervisor mode and endinit, then maybe the transaction being used to change the register has an issue in some way.

[User19909]

Darren Galpin wrote:
Could you Iook at the error capture information in the BBB BCU so that we can find out the details of the transaction, such as opcode, supervisor mode etc? As the register is only protected by ACCEN, supervisor mode and endinit, then maybe the transaction being used to change the register has an issue in some way.

the EADD register is holding 0xFA010210 and the EDAT is holding 0xFFFFFFFF this takes place just as this line is executed.
EMEM_CLC.U = 0x00000000U;

[MoD]

Can you check which address is defined for EMEM_CLC?
Address in EADD is MCDS_FIFOCTL
EMEM_CLC should be 0xFA006000