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JexJiang
Level 2
Level 2
First solution authored 10 replies posted 10 sign-ins

Hi:

    I ran into a problem, after flash operations (erase, read, write), the period of STM0 is inaccurate. The period of STM is set to 1ms, and the Flash operation is Pflash. Before operating Pflash, the IfxCpu_disableInterrupts() API will be called, and after the operation, the IfxCpu_restoreInterrupts() API will be called; then the timing period of STM0 becomes much larger than 1ms, which is generated after overflow interruption.

 

This is STM0 code.

JexJiang_0-1642473607956.png

 

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4 Replies
dw
Moderator
Moderator
Moderator
100 likes received 750 replies posted 10 likes given

Hi JexJiang,

Below is a reference code for ISR_STM, if you disable interrupt too long, the ISR_STM cannot be executed in time. If you need to do PFlash operations, need to be cautious for ISR process. You can only disable the Interrupt for a very short time. And in ISR_STM routine, you can restart the 1ms tick and clear the related flag. 

Regards,

dw

 

 

 

void isrSTM(void)
{
    /* Update the compare register value that will trigger the next interrupt and toggle the LED */
    IfxStm_increaseCompare(STM, g_STMConf.comparator, g_ticksFor500ms);
    IfxPort_setPinState(LED, IfxPort_State_toggled);
}



/* Function to initialize the STM */
void initSTM(void)
{
    IfxStm_initCompareConfig(&g_STMConf);           /* Initialize the configuration structure with default values   */

    g_STMConf.triggerPriority = ISR_PRIORITY_STM;   /* Set the priority of the interrupt                            */
    g_STMConf.typeOfService = IfxSrc_Tos_cpu0;      /* Set the service provider for the interrupts                  */
    g_STMConf.ticks = g_ticksFor500ms;              /* Set the number of ticks after which the timer triggers an
                                                     * interrupt for the first time                                 */
    IfxStm_initCompare(STM, &g_STMConf);            /* Initialize the STM with the user configuration               */
}

 

 

 

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JexJiang
Level 2
Level 2
First solution authored 10 replies posted 10 sign-ins

Dear dw:

           How to do restat the STM0 at 1ms interval.Reinit the STM0 compare or reload tht cmp[0] value as STM0.TIM0?
Regards,

JexJiang

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dw
Moderator
Moderator
Moderator
100 likes received 750 replies posted 10 likes given

Hi JexJiang,

Please refer to below demo code for STM in Aurix Development Studio.

STM_Interrupt_1_KIT_TC375_LK

Regards,

dw

 

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JexJiang
Level 2
Level 2
First solution authored 10 replies posted 10 sign-ins

After testing, the cycle of STM is indeed 1ms, and the Ifx_CPUdisableinterrupt of Pflash will not affect the cycle of STM. It should be that other functional modules are affected.

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