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User19276
Level 1
Level 1
First question asked Welcome!

Hello!  

I encountered a trap while implementing MBIST(Non-destructive inversion test) for DSPR of TC234 chip.Currently, PSPR memory test code has been compiled, but DSPR has been unable to resolve the error problem.8328787D-FC15-4546-B141-B4FF28C4DBC9.png

Can you help me with the DSPR error? I know not to debug when testing the DSPR.

When performing MBIST tests for DSPR, I think it's about IfxMtu_clearSram (mbistSel), IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, 0, 0 xFF, 0, & errAddr) these two functions the trap, but I can't find the reason.

According to the instructions in the TC234 chip manual, I enabled PTAG when implementing PSPR memory detection, and then passed the compilation (if PTAG is not enabled, the PSPR test will also display trap), the code is as follows, is there a problem?

 

 

    uint16 errAddr = 0, result;

    /* Enable MTU clock */
    uint16 password = IfxScuWdt_getCpuWatchdogPassword();
    IfxScuWdt_clearCpuEndinit(password);
    IfxMtu_enableModule();
    IfxScuWdt_setCpuEndinit(password);

    /* Enable PTAG */
    password = IfxScuWdt_getSafetyWatchdogPassword();
    IfxScuWdt_clearSafetyEndinit(password);
    if(mbistSel == IfxMtu_MbistSel_cpu0Pspr){
        	IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Ptag);
    }
    IfxScuWdt_setSafetyEndinit(password);

    /* The Sram initialisation in synchronous polling mode */
    IfxMtu_clearSram(mbistSel);

    IfxScuWdt_clearSafetyEndinit(password);
    /* Run the Non-Destructive Inversion test */
    result = IfxMtu_runNonDestructiveInversionTest((IfxMtu_MbistSel)mbistSel,0,0xFF,0,&errAddr);
    /* Clear Error Flags which are set in case you want to run further tests*/
    IfxMtu_clearErrorTracking(mbistSel);
    IfxScuWdt_setSafetyEndinit(password);

 

 

Can someone help me solve this problem?

Thanks!

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1 Reply
zs
Level 1
Level 1
First reply posted Welcome!

Firstly, are you enabling IfxMtu_MbistSel_cpu0Pspr or IfxMtu_MbistSel_cpu0Ptag.

Check that the 0xFF passed into the NDT is correct for the high address for cpu0Pspr (0x2F for TC397). I ran into issues where the NDT was injecting errors way out of bounds of the RAM region because the example code hard coded 0xFF into the high address argument.

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