About QSPI , logic is inverted

[pistons7]

I am developing QSI communication with TC3xx.
I use the "IfxQspi_SpiSlave_exchange" function to send data from the master to the slave.

Does the "IfxQspi_SpiSlave_exchange" automatically control CS (chip select) which the level changes high to low?

If the logic is inverted due to circuit design, how should I set CS to change from Low to High?

Please tell me.

[Di_W]

There is a field called SLSIS 14:12 rw Slave Mode Slave Select Input Selection

If you want to use an inverse CS pin, could trya  speical GPIO pin for this purpose and disable above Select Input Pin.

dw

[cwunder]

Can you clarify if the AURIX is the SPI Master or Slave? As your statement that you are using "IfxQspi_SpiSlave_exchange" function to send data from the master to the slave is contradictory. This function would be use if the AURIX is the slave not the master.

For the master, you can enable the hardware chip select and its polarity in the SSOC register.

If the AURIX is the SPI Slave then the hardware chip select polarity can only be active low.