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AURIX™ Forum Discussions

apeter
Level 2
25 sign-ins 5 likes given 10 sign-ins
Level 2
Hi all,

We are using the AURIX TC27xD for our project.
We have integrated the hitex SafeTlib and it works on Power-on, however after a Soft reset (System reset) we get the error "bus error generated by CPU".

This happens because of writing to the register "FLASH0_FCON".

So my question now is which registers do we need to set/reset to achieve writing on the FLASH0_FCON register successfully?

Thanks and best regards,
APeter
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1 Solution
apeter
Level 2
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Level 2
For anyone who encounters such a problem we are now able to write on the FLASH0_FCON register.
In the HtxStlIf.c file from hitex you can increase the value HTXSTLIF_FLASH_FCON_WSPFLASH from 2U to 4U and reset your RAM after a system reset.

Further information:
If you do not reset your RAM after a system reset is performed the Safety Endinit Semaphore will be set and you wouldn't be able to call the function Mcal_ResetSafetyENDINIT_Timed() succesfully as the spinlock is already aquired by another instance.

View solution in original post

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5 Replies
NeMa_4793301
Level 6
10 solutions authored 5 solutions authored First solution authored
Level 6
Check out Table 10-19 Registers Overview on page 950 of tc27xD_um_v2.2.pdf: the "Access Mode" for writing to FCON says P, SV, E. The E here means that the register is ENDINIT protected.

To write to ENDINIT protected registers, you must unlock ENDINIT protection, do the write, and then relock. Something like this should work:

Mcal_ResetENDINIT();
FLASH0_FCON.U = whatever;
Mcal_SetENDINIT();
apeter
Level 2
25 sign-ins 5 likes given 10 sign-ins
Level 2
Thank you very much for your explanation UC_wrangler.

In the code it is already like you have described it above:
Mcal_ResetENDINIT();
FLASH0_FCON.U = whatever;
Mcal_SetENDINIT();

However I still can't write to this register. What else could be the cause of not writing to this register?
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NeMa_4793301
Level 6
10 solutions authored 5 solutions authored First solution authored
Level 6
Writing to the register also requires SV, or Supervisor mode. Is CPUx_PSW.IO=2?

Finally, the P means Access Protection applies. This would only be the case if you changed FLASH0_ACCEN0 from the default value of 0xFFFFFFFF (all bus masters allowed to write to FLASH registers).
apeter
Level 2
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Level 2
I checked the register CPU0_PSW and the register value CPU0_PSW.IO = 2
Also checked the FLASH0_ACCEN0 register and its value is 0xFFFFFFFF

Further information:
SCU_CCUCON0 at Power On Reset its Register Value is 0x01120148 and after a System Reset it is 0x12120112
The register values (fFSI2 and fSRI) aren't changed.

ENDINIT bit is cleared by Mcal_ResetENDINIT() -> Register value WDTCPU0CON0 is 0xFFFC000E before writing to FLASH0_FCON
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apeter
Level 2
25 sign-ins 5 likes given 10 sign-ins
Level 2
For anyone who encounters such a problem we are now able to write on the FLASH0_FCON register.
In the HtxStlIf.c file from hitex you can increase the value HTXSTLIF_FLASH_FCON_WSPFLASH from 2U to 4U and reset your RAM after a system reset.

Further information:
If you do not reset your RAM after a system reset is performed the Safety Endinit Semaphore will be set and you wouldn't be able to call the function Mcal_ResetSafetyENDINIT_Timed() succesfully as the spinlock is already aquired by another instance.
0 Likes