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Level 1
Level 1
Welcome! First question asked
Using a TC377, for a global variable 32bits used by the 3 cores, is it needed to protect it with a semaphore?
I would say not, but not sure.
2 Replies
Level 6
Level 6
10 likes received 10 solutions authored 5 solutions authored
No, but it depends. Let's say you have three cores that are setting or clearing a bit in a 32-bit variable - then you'd need some sort of semaphore or atomic instruction.

By default, the dLMU and LMU segment 0x9 is cacheable, and there is no automatic cache coherency with AURIX. You can set each CPU's PMA0 register so that dLMU/LMU is not cacheable (change it from the default 0x300 to 0x100), or purge the cache under application control.
Level 5
Level 5
25 solutions authored 10 likes received 50 sign-ins
Additional support for atomic variables has been introduced in the current v6.3r1 release of the TASKING TriCore tools. The release notes include the following details:

C11 Language and Library Support
This release supports C11 language and library features as defined by the ISO C standard. With the C compiler option --iso you select the ISO C standard. C90 (option value '90') is also referred to as the "ANSI C standard". C99 (option value '99') refers to the ISO/IEC 9899:1999 (E) standard. C11 (option value '11') refers to the ISO/IEC 9899:2011 (E) standard. C11 is the new default. All unconditional (mandatory) C11 features are supported. Of the conditional features which are introduced by C11 the Atomic feature is supported. Support can be checked by means of the conditional feature macros as defined by the C standard (section

Atomic Variable Support
The TASKING TriCore C compiler now supports atomic types (by means of the _Atomic type qualifier) and the features defined by the standard header file (the __STDC_NO_ATOMICS__ macro is 0 for TriCore architectures 1.6.x and 1.6.2). The compiler restricts atomic type qualification to those types and to those operations for which the hardware allows a lock-free implementation. The compiler only implements the strictest memory ordering: memory_order_seq_cst. This implies that all less strict orderings are also supported, but support for those is sub-optimal.

You can now use __uncached__ or __attribute__((uncached)) on variables to instruct the linker to allocate the corresponding variable in a non-cached memory segment. Extensions were made to the system LSL files to identify cached memory segments (new LSL keyword 'cached'). If a variable is declared with the 'uncached' attribute, its corresponding section name contains the substring ".uncached", for example .zbss.uncached.my_module.my_atomic_var. Atomic variables automatically imply the attribute 'uncached'.

Best regards,
Ulrich Kloidt

TASKING tools support