AIROC™ Wi-Fi and Wi-Fi Bluetooth Combos Forum Discussions
Dear Sir,
chip:CYW43455
Module:AW-CM390SM
I find a reference information and try to modify a NVRAM file to fixed the issue.
After adding a command “ccode=0” in the NVRAM, the symptom still appears.
Do you have any suggestions?
BTW, channel information is shown as below.
B.R.
Bill.
Show LessWe are attempting to use the bluetooth stack package provided via the connectivity expansion pack. We have initialized the btstack. We call the rfcommcreateconnection and receive a handler hardfault. I have traced this back to a function port_allocate_port. The system uses the LAIRD_EWB.
Show LessAfter checking the UART waveform by running the sample "ble_wifi_onbording" that comes with "STM32 Connectivity Expansion Pack 1.1.0", I have a question.
Is it normal for the CTS line to always go low after debug starts?
The CTS line is always low, even if the TX and RX lines are moving.
If this was an anomaly, what do you think caused it?
I checked the waveform between STM32H747 Disco Kit and uRata uSD-M2 Adapter.
<Device>
・STM32H747I-DISCO
STM32H747I-DISCO STMicroelectronics | Mouser
・LBEE0ZZ1WE-TEMP
LBEE0ZZ1WE-TEMP Murata Electronics | Mouser
・Wi-Fi/BT module: 1DX M.2 Module
1LV M.2 Module - Embedded Artists
Hi,
I'm trying to run the sample "ble_wifi_onbording" that comes with "STM32 Connectivity Expansion Pack 1.1.0", but I get the following error.
***************************
Wi-Fi Onboarding Using BLE
***************************
Timeout while waiting for high throughput clock
SDIO firmware download error, whd_bus_sdio_init failed at 454
Failed to [1667] handle_hci_rx_data_ready(): unknown type (0x00)
I get the same error with the other sample "wifi_scan".
******************* WiFi-Scan app *******************
Push blue button or send any symbol via serial terminal to continue...
CYW43xxx detected
Timeout while waiting for high throughput clock
SDIO firmware download error, whd_bus_sdio_init failed at 454
Failed to initialize Wi-Fi
What are the possible causes?
<Device used>
・STM32H747I-DISCO
STM32H747I-DISCO STMicroelectronics | Mouser
・LBEE0ZZ1WE-TEMP
LBEE0ZZ1WE-TEMP Murata Electronics | Mouser
・Wi-Fi/BT module: 1DX M.2 Module
1LV M.2 Module - Embedded Artists
I'm using a CYW43012 as part of Murata's LBEE59B1LV module. In our product, we need to reduce the transmit power of the CYW43012 to account for the antenna gain.
When using the Manufacturing Test firmware (wl0: Sep 1 2021 22:28:20 version 13.10.271.273 (9278a67 CY WLTEST) FWID 01-d304ce6e) , I can see that changes to maxp2ga0 and agbg0 are reflected in the output of running "wl curpower". When I perform an active scan using "iw", these settings do not seem to affect the output power of the device.
Details of the firmware, and the NVRAM dump:
# wl ver
wl0: Sep 1 2021 22:28:20 version 13.10.271.273 (9278a67 CY WLTEST) FWID 01-d304ce6e
# wl nvram_dump | grep -e "maxp2ga0" -e "agbg0"
agbg0=0x82
maxp2ga0=0x44
wl indicates that these changes are taking effect, e.g. the agbg0 setting is correctly being handled as a 2.5dB gain on the antenna:
# wl curpower | (head; tail -n 4)
Power Control: On, HW
Current Channel: 1
BSS Channel: 0/5
BSS Local Max: 0.0 dBm
BSS Local Constraint: 0.0 dB
Channel Width: 20MHz
User Target: 31.75 dBm
SROM Antgain 2G: 2.50 dB
SROM Antgain 5G: 0.0 dB
SAR: -32.0 dB
Maximum Power Target among all rates:15.50
Last est. power : 0.00
Power Target for the current rate :10.00
Last adjusted est. power : 0.00
An example use of iw to scan in a specific channel (which we then observe using a spectrum analyzer)
# iw dev wlan0 scan freq 2412 > /dev/null
Expected behaviour:
Changing the antenna gain the NVRAM file (i.e. by adjusting agbg0) will adjust the transmit power when performing an active scan.
Observed behaviour:
No change in transmit power.
Questions:
- Is the contents of the CLM blob overriding these settings?
- If so, how can we adjust the CLM blob?
Dear Sir,
How to use wl commands to increase scanning the number of APs based on excludeing RF characteristics?Or do you have any suggestions?
B.R.
Bill.
Show LessHello ,
I am using CYW4356 chip with SITARA processor "am3358" chip(beagle bone black).It is working fine when I configure it as station mode,but I am facing issue when I configure it as access point.
when any station tries to connect with this access point. it connects successfully and then WiFi chip dis-authenticate the station and disconnect it ,and gives error as below
Here I am attaching the kernel logs with hostapd logs and our hostapd configuration file.
so if anyone know why this kind of error can occur please help,
Thank you in advance .
Show Less
Dear Sir,
I want to verify BT wake function by the BT_WAKE_HOST pin and reference the document is "Headless Mode and Power Conservation for Bluetooth Device and Host".
The link is below.
My chip is CYW43455.
I have some questions for the document.
a.Do it only support interface of USB? If not, is it support interface of UART?
b. If IFX support interface of UART, may i know How to verify BT wake function by the BT_WAKE_HOST pin.Is sop the same as Headless Mode and Power Conservation for Bluetooth Device and Host"?
c.After we use"HCI Reset","HCI Write Scan Enable","Write Page Scan Activity","Write Page Scan Type" and "Set Sleep Mode Parameter", the BT_WAKE_HOST pin will be low and chip got to sleep mode.
I reference the document , he said when it is in "existing Headless Mode", the chip will be exit sleep mode.
B.R.
Bill.
Show Less
Hi,
While I study the datasheet of CYW43012, I found that "Peak PHY Calibration Current" is listed in specification of power consumption. Could you help to explain what it is?
Thanks.
Frankie
Show LessHi,
I'm starting to develop a custom bootloader which will be able to receive a firmware over uart and write it on flash. I've started from the tiny_bootloader provided in the wiced example and have integrated the sflash_write example and the uart driver.
For now I'm having issue during link, it does not find all variables which shall be provided by the linker: undefined reference to `link_aon_data_location' 'link_aon_data_end' 'link_ram_data_location'
See build output:
"C:\\workspace\\wiced\\WICED-Studio-6.6\\43xxx_Wi-Fi\\make.exe" roomz.custom_bootloader-CYW943907AEVAL1F JTAG=jlink download run
MAKEFILE MAKECMDGOALS=roomz.custom_bootloader-CYW943907AEVAL1F download run OTA2_SUPPORT is disabled
Building Bootloader waf.bootloader-NoOS-NoNS-CYW943907AEVAL1F-P103-SoC.43909
Building Serial Flash Loader App
prgm hdr cnt=3
total_size = 15920, entry_point = 0x696000
Loadsegment_offset = 0xA0 segment_size = 15684, segment_pad = 0
Loadsegment_offset = 0x3DF0 segment_size = 32, segment_pad = 0
Loadsegment_offset = 0x3E14 segment_size = 204, segment_pad = 0
Finished Building Bootloader
Finished Building Serial Flash Loader App
Making roomz.custom_bootloader-CYW943907AEVAL1F.elf
build/roomz.custom_bootloader-CYW943907AEVAL1F/Modules/apps/roomz/custom_bootloader/roomz_bootloader.o: In function `load_app':
C:\workspace\wiced\WICED-Studio-6.6\43xxx_Wi-Fi/apps/roomz/custom_bootloader/roomz_bootloader.c:140: undefined reference to `link_aon_data_location'
C:\workspace\wiced\WICED-Studio-6.6\43xxx_Wi-Fi/apps/roomz/custom_bootloader/roomz_bootloader.c:140: undefined reference to `link_aon_data_end'
tools/makefiles/wiced_elf.mk:315: recipe for target 'build/roomz.custom_bootloader-CYW943907AEVAL1F/binary/roomz.custom_bootloader-CYW943907AEVAL1F.elf' failed
C:\workspace\wiced\WICED-Studio-6.6\43xxx_Wi-Fi/apps/roomz/custom_bootloader/roomz_bootloader.c:140: undefined reference to `link_ram_data_location'
collect2.exe: error: ld returned 1 exit status
make.exe[1]: *** [build/roomz.custom_bootloader-CYW943907AEVAL1F/binary/roomz.custom_bootloader-CYW943907AEVAL1F.elf] Error 1
make: *** [main_app] Error 2
Makefile:351: recipe for target 'main_app' failed
However those variables seems to be present in the map file in 43xxx_Wi-Fi\build\roomz.custom_bootloader-CYW943907AEVAL1F\binary\roomz.custom_bootloader-CYW943907AEVAL1F.map
Any idea why the linker does not find them?
Show Less