CYW20819 I2C frequency

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ToKo_4602001
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Around 375 kHz is measured with an oscilloscope when I2CM_SPEED_400KHZ=60 is specified.

The following document (page 13, 14) shows that  I2CM_SPEED_400KHZ should set 400 kHz.

https://www.infineon.com/cms/en/product/wireless-connectivity/airoc-bluetooth-le-bluetooth-multiprot...

However I get about 400 kHz when "53" is specified.

Does Infineon use I2CM_SPEED_400KHZ=60 by design for some goal. Or I can tune the value to get 400 kHz actually?

 

(I have found similar topics in other posts for other SoCs. But I cannot find right answer.)

 

Regards,

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DheerajPK_41
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Update:

By setting the division value to 53, we are getting 400kHz as I2C Clock frequency. Please use this value for 400kHz. As I mentioned earlier, If there is a slight change in the actual frequency, you can adjust the division value to the appropriate and set.

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DheerajPK_41
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Hi,

May I know which device are you using to measure the the frequency? 

If there is slight change, yes you can adjust the division value to the appropriate and set. But I hope that correction also have to do from our side in the lower layers of the stack. Let me also check and confirm it. 

Thanks,

-Dheeraj.P.K

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We have used generic oscilloscopes and logic analyzers. And the device under test is a CYW20819 SoC withmtb-examples-CYW920819EVB-02-btsdk-pro-iap2 sample code.

Please let me know the confirmation results on Infineon side.

 

 

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DheerajPK_41
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Hi,

I will try to verify it later since I do not have an accurate measuring device at the present moment. Meantime, may I know whether the clock drift causing you any trouble? Usually this small change in the SCL does not cause any issues.

Thanks,

-Dheeraj.P.K

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ToKo_4602001
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There are only a few functional problems with this issue. I have no practical problems. I2C device will work with lower clock rate.

However this issue indicates that the description about I2C in the document ( AN226546 CYW20819 Feature and Peripheral Guide ) has errors. Our customer contacted us about the reason of this deference.  We need to answer that.

As a side note, if we tune clock rate and if Infineon  tunes it in lower stack further in the future, I2C clock will be over 400 kHz and it is cause problems.

Thanks

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DheerajPK_41
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Hi,

We understand your concern. Let us do more testing on it and get the data. 

A new version of the peripheral guide will be released soon and we will make corrections if anything needed. But here I guess if the division value is not setting appropriate frequency that can be fixed in the FW instead of modifying the document.

Thanks,

-Dheeraj.P.K

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DheerajPK_41
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750 replies posted 500 likes received 500 replies posted

Update:

By setting the division value to 53, we are getting 400kHz as I2C Clock frequency. Please use this value for 400kHz. As I mentioned earlier, If there is a slight change in the actual frequency, you can adjust the division value to the appropriate and set.

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