BLE Pipe dreams

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EdHa_4455331
Level 5
Level 5
25 replies posted 25 sign-ins 10 replies posted

I need to use the CM4-to-CM0 pipe to send messages from the CM4 processor to the CM0 processor. This should be relatively straight forward, BUT... I am running the BLE stack on CM0, and Cy_BLE_Start(0) registers callbacks for pipe messages coming from CM4.  Which (in painful retrospect) is no big surprise because the BLE stack has to talk back and forth with BLE functions running on CM4.

But, depending on the order I do things, either Cy_BLE_Start(0) clobbers the callback registration for my custom messages or the callback registration for my custom messages clobbers the callback registrations made by Cy_BLE_Start(0).

So, does anybody know how to share the CM4-to-CM0 between BLE and an additional message receiver on CM0?

Thanks,

Ed H.

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1 Solution
Yugandhar
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 5 likes given

Hello,

With Dual core (Controller on CM0+, Host and Profiles on CM4) configuration in BLE component, Cy_BLE_Start() function should be called on both cores in the following sequence:
1. Call this function on the CM0+ core to initialize the Controller.
2. Start the CM4 core by calling the Cy_SysEnableCM4() function.
3. Call this function on the CM4 core to initialize the Host and Profiles.

The following sequence of events are involved in a typical low-power BLE design for dual-CPU architecture:
• In Dual-CPU Architecture, the BLESS interrupt is mapped to the BLE Controller CPU. The BLESS interrupt wakes up the Controller during every connection interval.
• The controller CPU then services the BLE event with Cy_BLE_ProcessEvents() in firmware.
• If the Host must process a BLE event or data, the Controller wakes up the Host CPU using the Inter Processor Communication (IPC) interrupt.
• Upon receiving the BLE event or data through the IPC interrupt, the Host CPU processes it using Cy_BLE_ProcessEvents()and registered event handler functions. If the Host CPU requires the service of the Controller CPU, the Host sends the BLE data/event using IPC.

Please refer to the page 21 in the AN215671 - PSoC 6 MCU - Firmware Design for BLE Applications datasheet for more information.

Thanks,
P Yugandhar.

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1 Reply
Yugandhar
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 5 likes given

Hello,

With Dual core (Controller on CM0+, Host and Profiles on CM4) configuration in BLE component, Cy_BLE_Start() function should be called on both cores in the following sequence:
1. Call this function on the CM0+ core to initialize the Controller.
2. Start the CM4 core by calling the Cy_SysEnableCM4() function.
3. Call this function on the CM4 core to initialize the Host and Profiles.

The following sequence of events are involved in a typical low-power BLE design for dual-CPU architecture:
• In Dual-CPU Architecture, the BLESS interrupt is mapped to the BLE Controller CPU. The BLESS interrupt wakes up the Controller during every connection interval.
• The controller CPU then services the BLE event with Cy_BLE_ProcessEvents() in firmware.
• If the Host must process a BLE event or data, the Controller wakes up the Host CPU using the Inter Processor Communication (IPC) interrupt.
• Upon receiving the BLE event or data through the IPC interrupt, the Host CPU processes it using Cy_BLE_ProcessEvents()and registered event handler functions. If the Host CPU requires the service of the Controller CPU, the Host sends the BLE data/event using IPC.

Please refer to the page 21 in the AN215671 - PSoC 6 MCU - Firmware Design for BLE Applications datasheet for more information.

Thanks,
P Yugandhar.

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