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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

hi    

 

 could you please tell me how long i should send the normal FSP  signal from MCU sides in oder to make sure the 35584 can not detect the Err pin error after system  power up?

50 -100us?

after power up the ecu , i did not send the FSP signal , but the 35584 sent a rot signal to ask the MCU can not run . and i found this bit err monitor function is Enable defaultly.

wangchenyu_0-1701682969089.png

 

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1 解答
Xiangrui
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Hi Chenyu,

During INIT-state the device expects valid communication with the µC within the INIT timer (600 ms). Otherwise an initialization timeout will occur. The INIT timer starts with the rising edge of ROT.
The INIT timer is stopped as soon as three boundary conditions are fulfilled:
• Valid SPI communication received from µC
• Watchdog(s) serviced once according to default configuration or according to reconfiguration
• ERR monitoring serviced properly (minimum 3 periods provided) or configured to be OFF.

So, I think 600ms is enough for MCU initialization and FSP sending.

Thanks,

Xiangrui

在原帖中查看解决方案

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26 回复数
wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

from my sides, i think the error pin monitor start once the ECU power up, so MCU should sentd the FSP as soon as possible, in order to TLF35584 can detect the FSP signal , otherwise, the TLF35584 will think the FSP error and lead to the ROT low. and i check the datasheet and find the ΔtDET,LF is 55-100us,but i think the mcu could not send this valid fsp signal so fast. so the error monitor should triger the state from init to init repeatly, the rot will be pulled peroid, but it did not excute these step, this is my doubt point.

wangchenyu_0-1701739629966.png

 

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Xiangrui
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Hi Wangchen,

Please following is the timing diagram:

Xiangrui_0-1701759981149.png

ERR pin time out is about 10ms.

BR,

Xiangrui

 

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

hi Xiangrui

thank you for your feedback firstly , but the paramter you provide is wake to init , i need the parameter power up to init or init to init

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Xiangrui
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Hi Wangcheng,

Thanks for pointing out. Then I think you are right, the toggling signal should be provided within 50.1-99.9us.

So, could you disable ERR monitor when MCU is not ready?

Because according to datasheet, "It is recommended to provide the ERR signal to the ERR pin before activating the function again via SPI."

BR,

Xiangrui

BR,

Xiangrui

 

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

hi Xiangrui

I have a doubt point, the TLF35584 enter into the init status once power up,  the error monitor start working , but i think MCU has not the abillity to provide the vaild FSP signal with 50-100us, so the TLF35584 should output the reset siganl by rot port . but in fact the TLF35584 did not excute according to i descriped up .  so i wonder if there is other reason?  the error monitor function is enable  defaultly

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Xiangrui
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Hi Wangchen,

That's a good question. I need some time to check the mechanism.

Btw, did you test on our demo board?

BR,

Xiangrui

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wangchenyu
Level 2
Level 2
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no , but i found the MPS is high level, i don't make sure if mps make impact to it

wangchenyu_0-1701769172491.png

 

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Xiangrui
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Hi Chenyu,

Of course. If you set MPS high, then WD and ERR fault will not pull low ROT.

BR,

Xiangrui

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wangchenyu
Level 2
Level 2
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but , the mps is high level all the time . the TLF35584 will pull down the ROT once WD happen issue

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Xiangrui
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Hi Chenyu,

It won't happen.

But ROT will be pulled low when LDO undervoltage.

BR,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

I think it won't happen as well. but i open the wdg of tlf35584,after that I ask the sw stop at the break point by debug tools. the mcu reset quickly.

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Xiangrui
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Hi Chenyu,

Then please test if the Voltage on MPS is really 5V.

If so, please capture the waveform of Vmps=high and Vrot=low.

BR,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

hi xiangrui

I will check the status of mps and rot when enable the wdg.

could you please check the doubt points mentioned up synchronized

Hi Wangchen,

That's a good question. I need some time to check the mechanism.

Btw, did you test on our demo board?

BR,

Xiangrui

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Xiangrui
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Yes, I will help to confirm the sequence of sending FSP signal.

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

hi 

please find the picture as following:

after power up , fsp was sent in the 132ms. i think the MCU shuld be reset by rot according to guideline.

MPS is low all the time

wangchenyu_0-1701831467485.png

 

 

 

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Xiangrui
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500 replies posted 250 solutions authored 50 likes received

Hi Chenyu,

If MCU has been reset or sent the FSP in 132ms because of programming is easy to verify.

Just put a probe on ROT to see how is the waveform.

Thanks,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

mcu was not reset , and the ROT is high level all the time .

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Xiangrui
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500 replies posted 250 solutions authored 50 likes received

Hi Chenyu,

 

OK, I understand what you mean. 

I will help to confirm the ERR monitor mechanism for the first edge.

BR,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

hi xiangrui

regarding to this question ,did you get the description accordingly from your sides?

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Xiangrui
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Hi Chenyu,

No, the function details have to be checked with our German R&D colleagues. Now is near Christmas, so the response time is hard to guarantee. I will update here once I get response.

However, there is an optional solution: pull up MPS by MCU after PMIC power ON, and pull low MPS after MCU initialization and is able to send FSP and WD signal.

BR,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

thank you for your effort for my question

i think this  method is unavailable for the ECU , due to the mcu need to take 100us nearbyly for change the PLL to locked status. and the MPS is set by hardware , SW can not handle it .

 However, there is an optional solution: pull up MPS by MCU after PMIC power ON, and pull low MPS after MCU initialization and is able to send FSP and WD signal

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Xiangrui
Moderator
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500 replies posted 250 solutions authored 50 likes received

Hi Chenyu,

During INIT-state the device expects valid communication with the µC within the INIT timer (600 ms). Otherwise an initialization timeout will occur. The INIT timer starts with the rising edge of ROT.
The INIT timer is stopped as soon as three boundary conditions are fulfilled:
• Valid SPI communication received from µC
• Watchdog(s) serviced once according to default configuration or according to reconfiguration
• ERR monitoring serviced properly (minimum 3 periods provided) or configured to be OFF.

So, I think 600ms is enough for MCU initialization and FSP sending.

Thanks,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

你好

我觉得你这个解释似乎没有解释FSP 的问题,只是在讲init timer , 这两者似乎没有什么关系。  或者你的意思是error monitor 会在init timer 停止后才开始检测?

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Xiangrui
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Hi Chenyu,

在init timer期间的600ms,你可以完成MCU的初始化,WD的设置,ERR monitor的设置。

如果需要ERR monitor的话,在600ms之内,PMIC收到3个周期的有效FSP信号即可判定通过。

之后环节对于ERR信号的要求我想你应该已经很清楚了,比如说唤醒之后的,或者是收到SPI信号之后对于ERR信号的要求在datasheet中都有标注,也很容易满足。

Regards,

Xiangrui

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wangchenyu
Level 2
Level 2
50 sign-ins 10 replies posted 5 replies posted

也就是说ERROR monitor 的首次检测与WDG类似? 手册里有相关说明么?

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Xiangrui
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Hi Chenyu,

是这样的,我刚刚选中的回复就是节选自手册10.2.2 INIT-state,你可以自行检索。

除了那一部分之外还有10.3.2 INIT -> NORMAL-state章节中有一些。

Regards,

Xiangrui

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