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CYW43907 I2C Operation

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CYW43907 I2C Operation

VinayakS_26
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This blog post discusses connecting CYW43907 to an I2C Slave. Cypress Serial Control (CSC) is an I2C compatible serial interface in CYW43907 and supports up to 400 KHz. CSC supports only I2C master that can be used to communicate with external I2C slaves. There are two instances of CSC blocks – I2C0 and I2C1.

 

I2C0 – This instance of I2C supports speeds such as  10 KHz, 100 KHz, and 400 KHz speed. I2C0 supports repeated start, however, it does not support clock stretching. Physical I2C0 pins are multiplexed with other functions(which could be found in the Pin Mux Table of CYW43907) and can be used as General Purpose I/Os(GPIO) if I2C0 is not being used by the application.

 

I2C1 – I2C1 also supports such as 10 KHz, 100 KHz, and 400 KHz speed. It does not support Repeated start and Clock stretching. I2C1 uses fixed function pins.

 

 

A bit banging I2C driver is also supported in WICED Studio that can be used for the applications that need to support clock stretching. Only I2C0 pins can be used for the bit-banging interface.

 

Pin List

The I2C pins are pulled up using 4.7K resistors in CYW943907AEVAL1F EVK.(as shown in the following figure).

 

I2C Interface
MURATA Module Pin Name
Pin Header
I2C0_SCLK I2C_0_SCL J6. 23
I2C0_SDATA I2C_0_SDA J6.25
I2C1_SCLK I2C_1_SCL J12 .9
I2C1_SDATA I2C_1_SDA J12.10

 

 

i2c_pullup.jpg

 

Adding I2C to your application in WICED Studio

Wiced Studio supports GSIO (CSC) based I2C or bit-banging. The I2C bit-banging driver is more CPU Intensive than the default hardware driver, so it is recommended to use I2C bit-banging only when the slave requires clock stretching. Note that I2C1 doesn't support bit-banging and hence the following options are applicable only for I2C0 interface.

The drivers available for I2C0 could be selected in the platform file of CYW43907.(/43xxx_Wi-Fi/platforms/CYW943907AEVAL1F/platform.c)

Modify the I2C peripherals structure (platform_i2c_peripherals)

  1. i2c_gsio_driver.(default)
  2. i2c_bb_driver.(bit-banging driver)

 

 

 

API’s available

 

In WICED Studio, physical I2C0 is referred as WICED_I2C_1 and I2C1 is referred as WICED_I2C_1 and must be used accordingly with APIs.

I2C API’s are defined in /43xxx_Wi-Fi/WICED/platform/MCU/wiced_platform_common.c.

API documentation included as part of WICED Studio covers these APIs in great detail, here is high-level description of APIs available for I2C for this device -


1.wiced_result_t wiced_i2c_init (const wiced_i2c_device_t * device)

Description: Initializes an I2C interface for communication as a master. The I2C port, speed modes, start address, addressing width along with the mode of operation (with or without DMA) for the interface is configured using this API. The API resets the I2C Pins to remove any previous states on the pins.

 

2.wiced_result_t wiced_i2c_write (const wiced_i2c_device_t* device, uint16_t flags, const void* buffer, uint16_t buffer_length )

Description: Writes data over the i2c interface. The start byte is (0000001) which pulls the SDA line low while the clock is high hence meeting the start condition. This is followed by the slave address. The data bytes are then transmitted to the slave. The stop condition is generated if the slave NACKs or the data transaction

completes through its entire length. The master sends a dummy byte before the stop condition is generated. It supports repeated start as well where the sender transfers multiple data bytes without sending the stop bit in between transfers. The Repeated start is supported only in I2C0 interface.

The flags that need to be passed to the API for generating the stop and start conditions respectively: WICED_I2C_STOP_FLAG, WICED_I2C_START_FLAG, WICED_I2C_REPEATED_START_FLAG

 

3.wiced_result_t wiced_i2c_read( const wiced_i2c_device_t* device, uint16_t flags, void* buffer, uint16_t buffer_length )

Description: Read data over an I2C interface from the slave corresponding to the slave address.  The transaction begins with a start byte from the master, followed by slave address. Data is read from the slave. This continues till the entire length of data is read or the slave NACKs. A dummy byte is sent by the master, before generating a stop condition. The flags that need to be passed to the API for generating the stop and start conditions respectively: WICED_I2C_STOP_FLAG, WICED_I2C_START_FLAG, WICED_I2C_REPEATED_START_FLAG.

 

4. wiced_result_t wiced_i2c_transfer( const wiced_i2c_device_t* device, wiced_i2c_message_t* messages, uint16_t number_of_messages )

Description: Used to do read/write data over an I2C interface. It supports repeated start condition where the sender transfers multiple data bytes without sending the stop bit in between transfers. The repeated start condition can only be generated in I2C0 interface.

 

5. wiced_bool_t wiced_i2c_probe_device( const wiced_i2c_device_t* device, int retries )

Description: Checks whether the device is available on a bus or not. This reads 2 bytes of data from the addressed slave. The slave won’t be acknowledged if it isn’t on the I2C Bus in which case the API returns 0.

 

 

Relevant Macros and Flags:

WICED Ports

(a) WICED_I2C_1(b) WICED_I2C_2

 

Addressing and Speed modes

Address width available for addressing the slave is set using the following enum flags.(For both GSIO and BB Drivers).

    I2C_ADDRESS_WIDTH_7BIT

    I2C_ADDRESS_WIDTH_10BIT

    I2C_ADDRESS_WIDTH_16BIT

 

Speed Modes available for the two drivers (Bit banging and GSIO) and the corresponding enum flags.

SPEED MODES
BIT BANGING
GSIO
I2C_LOW_SPEED_MODE 5KHz 10KHz
I2C_STANDARD_SPEED_MODE 50KHz 100KHz
I2C_HIGH_SPEED_MODE 100KHz 400KHz

 

The application attached reads the ADC output via an I2C interface and display in a webpage. Follow the instructions added as comments in the code.

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