Static Timing Analysis

Project : CharLCD_CustomFont01
Build Time : 05/07/15 10:52:58
Device : CY8C4245AXI-483
Temperature : -40C - 85C
VDDA : 5.50
VDDD : 5.50
Voltage : 5.5
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
CyHFCLK CyHFCLK 24.000 MHz 24.000 MHz N/A
I2C_1_SCBCLK CyHFCLK 1.600 MHz 1.600 MHz N/A
CyILO CyILO 32.000 kHz 32.000 kHz N/A
CyIMO CyIMO 24.000 MHz 24.000 MHz N/A
CyLFCLK CyLFCLK 32.000 kHz 32.000 kHz N/A
CySYSCLK CySYSCLK 24.000 MHz 24.000 MHz N/A
I2C_1_SCBCLK(FFB) I2C_1_SCBCLK(FFB) 1.600 MHz 1.600 MHz N/A