Static Timing Analysis

Project : Sample Sine PSFB with delay
Build Time : 11/18/16 18:06:58
Device : CY8C5868AXI-LP035
Temperature : -40C - 85/125C
VDDA : 5.00
VDDABUF : 5.00
VDDD : 5.00
VDDIO0 : 5.00
VDDIO1 : 5.00
VDDIO2 : 5.00
VDDIO3 : 5.00
VUSB : 5.00
Voltage : 5.0
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
ADC_DelSig_1_Ext_CP_Clk ADC_DelSig_1_Ext_CP_Clk 48.000 MHz 48.000 MHz N/A
ADC_DelSig_1_Ext_CP_Clk(routed) ADC_DelSig_1_Ext_CP_Clk(routed) 48.000 MHz 48.000 MHz N/A
ADC_DelSig_1_theACLK(fixed-function) ADC_DelSig_1_theACLK(fixed-function) 461.538 kHz 461.538 kHz N/A
CyILO CyILO 1.000 kHz 1.000 kHz N/A
CyIMO CyIMO 3.000 MHz 3.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 48.000 MHz 48.000 MHz N/A
CyBUS_CLK CyMASTER_CLK 48.000 MHz 48.000 MHz 69.411 MHz
ADC_DelSig_1_theACLK CyMASTER_CLK 461.538 kHz 461.538 kHz N/A
CyPLL_OUT CyPLL_OUT 48.000 MHz 48.000 MHz N/A
CyXTAL CyXTAL 24.000 MHz 24.000 MHz N/A
\ADC_DelSig_1:DSM\/dec_clock \ADC_DelSig_1:DSM\/dec_clock UNKNOWN UNKNOWN N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 20.8333ns(48 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
raw_1B/q \DELAY2B:PWMUDB:trig_last\/main_0 69.411 MHz 14.407 6.426
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(1,1) 1 raw_1B raw_1B/clock_0 raw_1B/q 1.250
Route 1 raw_1B raw_1B/q raw_2B/main_3 3.177
macrocell5 U(1,2) 1 raw_2B raw_2B/main_3 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2B:PWMUDB:trig_last\/main_0 3.120
macrocell20 U(0,2) 1 \DELAY2B:PWMUDB:trig_last\ SETUP 3.510
Clock Skew 0.000
raw_1B/q \DELAY2B:PWMUDB:runmode_enable\/main_0 69.411 MHz 14.407 6.426
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(1,1) 1 raw_1B raw_1B/clock_0 raw_1B/q 1.250
Route 1 raw_1B raw_1B/q raw_2B/main_3 3.177
macrocell5 U(1,2) 1 raw_2B raw_2B/main_3 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2B:PWMUDB:runmode_enable\/main_0 3.120
macrocell21 U(0,2) 1 \DELAY2B:PWMUDB:runmode_enable\ SETUP 3.510
Clock Skew 0.000
raw_1B/q \DELAY2A:PWMUDB:trig_last\/main_0 69.502 MHz 14.388 6.445
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(1,1) 1 raw_1B raw_1B/clock_0 raw_1B/q 1.250
Route 1 raw_1B raw_1B/q raw_2B/main_3 3.177
macrocell5 U(1,2) 1 raw_2B raw_2B/main_3 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2A:PWMUDB:trig_last\/main_0 3.101
macrocell17 U(1,2) 1 \DELAY2A:PWMUDB:trig_last\ SETUP 3.510
Clock Skew 0.000
raw_1B/q \DELAY2A:PWMUDB:runmode_enable\/main_0 69.502 MHz 14.388 6.445
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(1,1) 1 raw_1B raw_1B/clock_0 raw_1B/q 1.250
Route 1 raw_1B raw_1B/q raw_2B/main_3 3.177
macrocell5 U(1,2) 1 raw_2B raw_2B/main_3 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2A:PWMUDB:runmode_enable\/main_0 3.101
macrocell18 U(1,2) 1 \DELAY2A:PWMUDB:runmode_enable\ SETUP 3.510
Clock Skew 0.000
\PSFB_1:Net_891\/q \DELAY2B:PWMUDB:trig_last\/main_0 70.756 MHz 14.133 6.700
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(1,1) 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/clock_0 \PSFB_1:Net_891\/q 1.250
Route 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/q raw_2B/main_1 2.903
macrocell5 U(1,2) 1 raw_2B raw_2B/main_1 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2B:PWMUDB:trig_last\/main_0 3.120
macrocell20 U(0,2) 1 \DELAY2B:PWMUDB:trig_last\ SETUP 3.510
Clock Skew 0.000
\PSFB_1:Net_891\/q \DELAY2B:PWMUDB:runmode_enable\/main_0 70.756 MHz 14.133 6.700
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(1,1) 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/clock_0 \PSFB_1:Net_891\/q 1.250
Route 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/q raw_2B/main_1 2.903
macrocell5 U(1,2) 1 raw_2B raw_2B/main_1 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2B:PWMUDB:runmode_enable\/main_0 3.120
macrocell21 U(0,2) 1 \DELAY2B:PWMUDB:runmode_enable\ SETUP 3.510
Clock Skew 0.000
\PSFB_1:Net_891\/q \DELAY2A:PWMUDB:trig_last\/main_0 70.852 MHz 14.114 6.719
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(1,1) 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/clock_0 \PSFB_1:Net_891\/q 1.250
Route 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/q raw_2B/main_1 2.903
macrocell5 U(1,2) 1 raw_2B raw_2B/main_1 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2A:PWMUDB:trig_last\/main_0 3.101
macrocell17 U(1,2) 1 \DELAY2A:PWMUDB:trig_last\ SETUP 3.510
Clock Skew 0.000
\PSFB_1:Net_891\/q \DELAY2A:PWMUDB:runmode_enable\/main_0 70.852 MHz 14.114 6.719
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(1,1) 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/clock_0 \PSFB_1:Net_891\/q 1.250
Route 1 \PSFB_1:Net_891\ \PSFB_1:Net_891\/q raw_2B/main_1 2.903
macrocell5 U(1,2) 1 raw_2B raw_2B/main_1 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2A:PWMUDB:runmode_enable\/main_0 3.101
macrocell18 U(1,2) 1 \DELAY2A:PWMUDB:runmode_enable\ SETUP 3.510
Clock Skew 0.000
\PSFB_1:Net_896\/q \DELAY2B:PWMUDB:trig_last\/main_0 72.260 MHz 13.839 6.994
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(1,2) 1 \PSFB_1:Net_896\ \PSFB_1:Net_896\/clock_0 \PSFB_1:Net_896\/q 1.250
Route 1 \PSFB_1:Net_896\ \PSFB_1:Net_896\/q raw_2B/main_2 2.609
macrocell5 U(1,2) 1 raw_2B raw_2B/main_2 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2B:PWMUDB:trig_last\/main_0 3.120
macrocell20 U(0,2) 1 \DELAY2B:PWMUDB:trig_last\ SETUP 3.510
Clock Skew 0.000
\PSFB_1:Net_896\/q \DELAY2B:PWMUDB:runmode_enable\/main_0 72.260 MHz 13.839 6.994
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(1,2) 1 \PSFB_1:Net_896\ \PSFB_1:Net_896\/clock_0 \PSFB_1:Net_896\/q 1.250
Route 1 \PSFB_1:Net_896\ \PSFB_1:Net_896\/q raw_2B/main_2 2.609
macrocell5 U(1,2) 1 raw_2B raw_2B/main_2 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q \DELAY2B:PWMUDB:runmode_enable\/main_0 3.120
macrocell21 U(0,2) 1 \DELAY2B:PWMUDB:runmode_enable\ SETUP 3.510
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\DELAY1A:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY1A:PWMUDB:runmode_enable\/main_1 2.609
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(0,0) 1 \DELAY1A:PWMUDB:genblk1:ctrlreg\ \DELAY1A:PWMUDB:genblk1:ctrlreg\/clock \DELAY1A:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \DELAY1A:PWMUDB:control_7\ \DELAY1A:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY1A:PWMUDB:runmode_enable\/main_1 2.249
macrocell12 U(0,0) 1 \DELAY1A:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\DELAY2A:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY2A:PWMUDB:runmode_enable\/main_4 2.683
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell5 U(1,2) 1 \DELAY2A:PWMUDB:genblk1:ctrlreg\ \DELAY2A:PWMUDB:genblk1:ctrlreg\/clock \DELAY2A:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \DELAY2A:PWMUDB:control_7\ \DELAY2A:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY2A:PWMUDB:runmode_enable\/main_4 2.323
macrocell18 U(1,2) 1 \DELAY2A:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\DELAY2B:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY2B:PWMUDB:runmode_enable\/main_1 2.696
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell6 U(0,2) 1 \DELAY2B:PWMUDB:genblk1:ctrlreg\ \DELAY2B:PWMUDB:genblk1:ctrlreg\/clock \DELAY2B:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \DELAY2B:PWMUDB:control_7\ \DELAY2B:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY2B:PWMUDB:runmode_enable\/main_1 2.336
macrocell21 U(0,2) 1 \DELAY2B:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\DELAY1B:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY1B:PWMUDB:runmode_enable\/main_1 2.706
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(0,1) 1 \DELAY1B:PWMUDB:genblk1:ctrlreg\ \DELAY1B:PWMUDB:genblk1:ctrlreg\/clock \DELAY1B:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \DELAY1B:PWMUDB:control_7\ \DELAY1B:PWMUDB:genblk1:ctrlreg\/control_7 \DELAY1B:PWMUDB:runmode_enable\/main_1 2.346
macrocell15 U(0,1) 1 \DELAY1B:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\DELAY1A:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_1A/main_1 3.017
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(0,0) 1 \DELAY1A:PWMUDB:sP8:pwmdp:u0\ \DELAY1A:PWMUDB:sP8:pwmdp:u0\/clock \DELAY1A:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \DELAY1A:PWMUDB:cmp1_less\ \DELAY1A:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_1A/main_1 2.237
macrocell13 U(0,0) 1 delay_1A HOLD 0.000
Clock Skew 0.000
\DELAY2A:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_2A/main_1 3.069
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell4 U(1,2) 1 \DELAY2A:PWMUDB:sP8:pwmdp:u0\ \DELAY2A:PWMUDB:sP8:pwmdp:u0\/clock \DELAY2A:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \DELAY2A:PWMUDB:cmp1_less\ \DELAY2A:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_2A/main_1 2.289
macrocell19 U(1,2) 1 delay_2A HOLD 0.000
Clock Skew 0.000
\DELAY2B:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_2B/main_1 3.082
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell5 U(0,2) 1 \DELAY2B:PWMUDB:sP8:pwmdp:u0\ \DELAY2B:PWMUDB:sP8:pwmdp:u0\/clock \DELAY2B:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \DELAY2B:PWMUDB:cmp1_less\ \DELAY2B:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_2B/main_1 2.302
macrocell22 U(0,2) 1 delay_2B HOLD 0.000
Clock Skew 0.000
\PSFB_1:internal_pwm:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PSFB_1:Net_891\/main_1 3.083
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,1) 1 \PSFB_1:internal_pwm:PWMUDB:sP8:pwmdp:u0\ \PSFB_1:internal_pwm:PWMUDB:sP8:pwmdp:u0\/clock \PSFB_1:internal_pwm:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \PSFB_1:internal_pwm:PWMUDB:cmp1_less\ \PSFB_1:internal_pwm:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PSFB_1:Net_891\/main_1 2.303
macrocell9 U(1,1) 1 \PSFB_1:Net_891\ HOLD 0.000
Clock Skew 0.000
\DELAY1B:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_1B/main_1 3.086
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(0,1) 1 \DELAY1B:PWMUDB:sP8:pwmdp:u0\ \DELAY1B:PWMUDB:sP8:pwmdp:u0\/clock \DELAY1B:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \DELAY1B:PWMUDB:cmp1_less\ \DELAY1B:PWMUDB:sP8:pwmdp:u0\/cl0_comb delay_1B/main_1 2.306
macrocell16 U(0,1) 1 delay_1B HOLD 0.000
Clock Skew 0.000
\PSFB_1:internal_pwm:PWMUDB:sCTRLReg:SyncCtl:ctrlreg\/control_7 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\/main_0 3.176
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell1 U(1,0) 1 \PSFB_1:internal_pwm:PWMUDB:sCTRLReg:SyncCtl:ctrlreg\ \PSFB_1:internal_pwm:PWMUDB:sCTRLReg:SyncCtl:ctrlreg\/clock \PSFB_1:internal_pwm:PWMUDB:sCTRLReg:SyncCtl:ctrlreg\/control_7 0.360
Route 1 \PSFB_1:internal_pwm:PWMUDB:ctrl_enable\ \PSFB_1:internal_pwm:PWMUDB:sCTRLReg:SyncCtl:ctrlreg\/control_7 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\/main_0 2.816
macrocell8 U(1,1) 1 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
+ Clock To Output Section
+ CyBUS_CLK
Source Destination Delay (ns)
raw_1B/q EPWM2B(0)_PAD 37.936
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(1,1) 1 raw_1B raw_1B/clock_0 raw_1B/q 1.250
Route 1 raw_1B raw_1B/q raw_2B/main_3 3.177
macrocell5 U(1,2) 1 raw_2B raw_2B/main_3 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q Net_89/main_0 4.027
macrocell3 U(0,1) 1 Net_89 Net_89/main_0 Net_89/q 3.350
Route 1 Net_89 Net_89/q EPWM2B(0)/pin_input 5.815
iocell4 P12[7] 1 EPWM2B(0) EPWM2B(0)/pin_input EPWM2B(0)/pad_out 16.967
Route 1 EPWM2B(0)_PAD EPWM2B(0)/pad_out EPWM2B(0)_PAD 0.000
Clock Clock path delay 0.000
raw_1B/q EPWM2A(0)_PAD 37.351
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(1,1) 1 raw_1B raw_1B/clock_0 raw_1B/q 1.250
Route 1 raw_1B raw_1B/q raw_2B/main_3 3.177
macrocell5 U(1,2) 1 raw_2B raw_2B/main_3 raw_2B/q 3.350
Route 1 raw_2B raw_2B/q Net_87/main_0 4.592
macrocell2 U(1,0) 1 Net_87 Net_87/main_0 Net_87/q 3.350
Route 1 Net_87 Net_87/q EPWM2A(0)/pin_input 5.412
iocell3 P12[6] 1 EPWM2A(0) EPWM2A(0)/pin_input EPWM2A(0)/pad_out 16.220
Route 1 EPWM2A(0)_PAD EPWM2A(0)/pad_out EPWM2A(0)_PAD 0.000
Clock Clock path delay 0.000
\PSFB_CTRL:Sync:ctrl_reg\/control_1 EPWM1A(0)_PAD 34.507
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell2 U(1,1) 1 \PSFB_CTRL:Sync:ctrl_reg\ \PSFB_CTRL:Sync:ctrl_reg\/busclk \PSFB_CTRL:Sync:ctrl_reg\/control_1 2.050
Route 1 psfb_go \PSFB_CTRL:Sync:ctrl_reg\/control_1 Net_83/main_0 3.706
macrocell4 U(0,0) 1 Net_83 Net_83/main_0 Net_83/q 3.350
Route 1 Net_83 Net_83/q EPWM1A(0)/pin_input 8.786
iocell1 P12[4] 1 EPWM1A(0) EPWM1A(0)/pin_input EPWM1A(0)/pad_out 16.615
Route 1 EPWM1A(0)_PAD EPWM1A(0)/pad_out EPWM1A(0)_PAD 0.000
Clock Clock path delay 0.000
\PSFB_CTRL:Sync:ctrl_reg\/control_1 EPWM1B(0)_PAD 31.675
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell2 U(1,1) 1 \PSFB_CTRL:Sync:ctrl_reg\ \PSFB_CTRL:Sync:ctrl_reg\/busclk \PSFB_CTRL:Sync:ctrl_reg\/control_1 2.050
Route 1 psfb_go \PSFB_CTRL:Sync:ctrl_reg\/control_1 Net_85/main_0 2.645
macrocell1 U(0,1) 1 Net_85 Net_85/main_0 Net_85/q 3.350
Route 1 Net_85 Net_85/q EPWM1B(0)/pin_input 7.592
iocell2 P12[5] 1 EPWM1B(0) EPWM1B(0)/pin_input EPWM1B(0)/pad_out 16.038
Route 1 EPWM1B(0)_PAD EPWM1B(0)/pad_out EPWM1B(0)_PAD 0.000
Clock Clock path delay 0.000
+ Asynchronous Constraints
+ Recovery
Path Delay Requirement : 20.8333ns(48 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\PSFB_CTRL:Sync:ctrl_reg\/control_0 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\/ar_0 207.426 MHz 4.821 16.012
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell2 U(1,1) 1 \PSFB_CTRL:Sync:ctrl_reg\ \PSFB_CTRL:Sync:ctrl_reg\/busclk \PSFB_CTRL:Sync:ctrl_reg\/control_0 2.050
Route 1 n_psfb_en \PSFB_CTRL:Sync:ctrl_reg\/control_0 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\/ar_0 2.771
macrocell8 U(1,1) 1 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\ RECOVERY -0.000
Clock Skew 0.000
+ Removal
Source Destination Slack (ns) Violation
\PSFB_CTRL:Sync:ctrl_reg\/control_0 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\/ar_0 3.391
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell2 U(1,1) 1 \PSFB_CTRL:Sync:ctrl_reg\ \PSFB_CTRL:Sync:ctrl_reg\/busclk \PSFB_CTRL:Sync:ctrl_reg\/control_0 0.620
Route 1 n_psfb_en \PSFB_CTRL:Sync:ctrl_reg\/control_0 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\/ar_0 2.771
macrocell8 U(1,1) 1 \PSFB_1:internal_pwm:PWMUDB:runmode_enable\ REMOVAL 0.000
Clock Skew 0.000