Static Timing Analysis

Project : SPI_32
Build Time : 11/25/13 12:11:45
Device : CY8C5868AXI-LP035
Temperature : -40C - 85/125C
Vdda : 5.00
Vddd : 5.00
Vio0 : 5.00
Vio1 : 5.00
Vio2 : 5.00
Vio3 : 5.00
Voltage : 5.0
Vusb : 5.00
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
CyILO CyILO 1.000 kHz 1.000 kHz N/A
CyIMO CyIMO 3.000 MHz 3.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
Clock_1 CyMASTER_CLK 2.000 MHz 2.000 MHz 53.132 MHz
CyBUS_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz 64.508 MHz
s_clk(0)/fb CyMASTER_CLK UNKNOWN UNKNOWN 32.254 MHz
CyPLL_OUT CyPLL_OUT 24.000 MHz 24.000 MHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 500ns(2 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:TxStsReg\/status_3 53.132 MHz 18.821 481.179
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 2.110
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:load_rx_data\/main_4 5.629
macrocell8 U(2,2) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_4 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:TxStsReg\/status_3 6.162
statusicell2 U(3,1) 1 \SPIM:BSPIM:TxStsReg\ SETUP 1.570
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:TxStsReg\/status_3 53.792 MHz 18.590 481.410
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_4 2.110
Route 1 \SPIM:BSPIM:count_4\ \SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:load_rx_data\/main_0 5.398
macrocell8 U(2,2) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_0 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:TxStsReg\/status_3 6.162
statusicell2 U(3,1) 1 \SPIM:BSPIM:TxStsReg\ SETUP 1.570
Clock Skew 0.000
\SPIM:BSPIM:sR8:Dp:u0\/f1_blk_stat_comb \SPIM:BSPIM:RxStsReg\/status_6 54.242 MHz 18.436 481.564
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ \SPIM:BSPIM:sR8:Dp:u0\/clock \SPIM:BSPIM:sR8:Dp:u0\/f1_blk_stat_comb 5.280
Route 1 \SPIM:BSPIM:rx_status_4\ \SPIM:BSPIM:sR8:Dp:u0\/f1_blk_stat_comb \SPIM:BSPIM:rx_status_6\/main_5 5.901
macrocell9 U(2,2) 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/main_5 \SPIM:BSPIM:rx_status_6\/q 3.350
Route 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/q \SPIM:BSPIM:RxStsReg\/status_6 2.335
statusicell1 U(2,2) 1 \SPIM:BSPIM:RxStsReg\ SETUP 1.570
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_1 \SPIM:BSPIM:TxStsReg\/status_3 57.127 MHz 17.505 482.495
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_1 2.110
Route 1 \SPIM:BSPIM:count_1\ \SPIM:BSPIM:BitCounter\/count_1 \SPIM:BSPIM:load_rx_data\/main_3 4.313
macrocell8 U(2,2) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_3 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:TxStsReg\/status_3 6.162
statusicell2 U(3,1) 1 \SPIM:BSPIM:TxStsReg\ SETUP 1.570
Clock Skew 0.000
\SPIM:BSPIM:state_1\/q \SPIM:BSPIM:cnt_enable\/main_1 57.405 MHz 17.420 482.580
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell11 U(3,1) 1 \SPIM:BSPIM:state_1\ \SPIM:BSPIM:state_1\/clock_0 \SPIM:BSPIM:state_1\/q 1.250
Route 1 \SPIM:BSPIM:state_1\ \SPIM:BSPIM:state_1\/q \SPIM:BSPIM:cnt_enable\/main_1 12.660
macrocell5 U(1,0) 1 \SPIM:BSPIM:cnt_enable\ SETUP 3.510
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_3 \SPIM:BSPIM:TxStsReg\/status_3 57.524 MHz 17.384 482.616
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_3 2.110
Route 1 \SPIM:BSPIM:count_3\ \SPIM:BSPIM:BitCounter\/count_3 \SPIM:BSPIM:load_rx_data\/main_1 4.192
macrocell8 U(2,2) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_1 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:TxStsReg\/status_3 6.162
statusicell2 U(3,1) 1 \SPIM:BSPIM:TxStsReg\ SETUP 1.570
Clock Skew 0.000
\SPIM:BSPIM:state_1\/q Net_190/main_1 57.837 MHz 17.290 482.710
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell11 U(3,1) 1 \SPIM:BSPIM:state_1\ \SPIM:BSPIM:state_1\/clock_0 \SPIM:BSPIM:state_1\/q 1.250
Route 1 \SPIM:BSPIM:state_1\ \SPIM:BSPIM:state_1\/q Net_190/main_1 12.530
macrocell4 U(1,0) 1 Net_190 SETUP 3.510
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_2 \SPIM:BSPIM:TxStsReg\/status_3 58.234 MHz 17.172 482.828
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_2 2.110
Route 1 \SPIM:BSPIM:count_2\ \SPIM:BSPIM:BitCounter\/count_2 \SPIM:BSPIM:load_rx_data\/main_2 3.980
macrocell8 U(2,2) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_2 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:TxStsReg\/status_3 6.162
statusicell2 U(3,1) 1 \SPIM:BSPIM:TxStsReg\ SETUP 1.570
Clock Skew 0.000
\SPIM:BSPIM:state_2\/q \SPIM:BSPIM:sR8:Dp:u0\/cs_addr_2 58.255 MHz 17.166 482.834
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(2,2) 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/clock_0 \SPIM:BSPIM:state_2\/q 1.250
Route 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/q \SPIM:BSPIM:sR8:Dp:u0\/cs_addr_2 9.616
datapathcell1 U(2,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 6.300
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:sR8:Dp:u0\/f1_load 58.435 MHz 17.113 482.887
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 2.110
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:load_rx_data\/main_4 5.629
macrocell8 U(2,2) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_4 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:sR8:Dp:u0\/f1_load 4.174
datapathcell1 U(2,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 1.850
Clock Skew 0.000
Path Delay Requirement : 41.6667ns(24 MHz)
Affects clock : CyMASTER_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
m_miso(0)/fb \SPIM:BSPIM:sR8:Dp:u0\/route_si 64.922 MHz 15.403 26.264
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell9 P1[5] 1 m_miso(0) m_miso(0)/in_clock m_miso(0)/fb 2.601
Route 1 Net_136 m_miso(0)/fb \SPIM:BSPIM:sR8:Dp:u0\/route_si 6.022
datapathcell1 U(2,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 6.780
Clock Skew 0.000
Path Delay Requirement : 41.6667ns
Affects clock : CyBUS_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/main_0 171.703 MHz 5.824 35.843
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell13 P5[3] 1 s_mosi(0) s_mosi(0)/in_clock s_mosi(0)/fb 2.692
Route 1 Net_101 s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/main_0 6.269
macrocell20 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\ SETUP 3.510
Clock Skew -6.647
Path Delay Requirement : 41.6667ns
Affects clock : CyBUS_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/enable 64.508 MHz 15.502 26.165
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 10.281
macrocell17 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 \SPIS:BSPIS:es3:SPISlave:inv_ss\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/q \SPIS:BSPIS:es3:SPISlave:BitCounter\/enable 2.680
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ SETUP 3.340
Clock Skew -6.647
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_2 65.249 MHz 15.326 26.341
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 10.281
macrocell17 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 \SPIS:BSPIS:es3:SPISlave:inv_ss\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_2 2.674
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.170
Clock Skew -6.647
s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 86.715 MHz 11.532 30.135
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell13 P5[3] 1 s_mosi(0) s_mosi(0)/in_clock s_mosi(0)/fb 2.692
Route 1 Net_101 s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_5 6.258
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_5 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.650
Clock Skew -6.647
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 149.858 MHz 6.673 34.994
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 10.822
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ RECOVERY -0.000
Clock Skew -6.647
Path Delay Requirement : 41.6667ns
Source Destination FMax Delay (ns) Slack (ns) Violation
\SPIS:BSPIS:es3:SPISlave:mosi_tmp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 78.653 MHz 12.714
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell20 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\ \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/clock_0 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/q 1.250
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\ \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/q \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_4 2.235
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_4 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.650
Clock Skew 0.000
Path Delay Requirement : 41.6667ns
Source Destination FMax Delay (ns) Slack (ns) Violation
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 88.106 MHz 11.350
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_0\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 2.709
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP -0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 88.207 MHz 11.337
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_2\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 2.696
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP -0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 89.294 MHz 11.199
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_1\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 2.558
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP -0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 89.302 MHz 11.198
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_3\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 2.557
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP -0.000
Clock Skew 0.000
Path Delay Requirement : 83.3333ns
Source Destination FMax Delay (ns) Slack (ns) Violation
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 68.871 MHz 14.520
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_0\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 2.709
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.170
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 68.932 MHz 14.507
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_2\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 2.696
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.170
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 69.594 MHz 14.369
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_1\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 2.558
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.170
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 69.599 MHz 14.368
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_3\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 2.557
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.170
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 71.169 MHz 14.051
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_0\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_3 2.712
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_3 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.650
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 71.281 MHz 14.029
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_2\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_1 2.690
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.650
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 71.999 MHz 13.889
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_3\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_0 2.550
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_0 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.650
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 72.005 MHz 13.888
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 2.110
Route 1 \SPIS:BSPIS:es3:SPISlave:count_1\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_2 2.549
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_2 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ SETUP 3.650
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
Net_131/q Net_131/main_0 3.477
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell3 U(0,0) 1 Net_131 Net_131/clock_0 Net_131/q 1.250
macrocell3 U(0,0) 1 Net_131 Net_131/q Net_131/main_0 2.227
macrocell3 U(0,0) 1 Net_131 HOLD 0.000
Clock Skew 0.000
Net_190/q Net_190/main_3 3.478
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell4 U(1,0) 1 Net_190 Net_190/clock_0 Net_190/q 1.250
macrocell4 U(1,0) 1 Net_190 Net_190/q Net_190/main_3 2.228
macrocell4 U(1,0) 1 Net_190 HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:load_cond\/q \SPIM:BSPIM:load_cond\/main_8 3.536
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell7 U(3,2) 1 \SPIM:BSPIM:load_cond\ \SPIM:BSPIM:load_cond\/clock_0 \SPIM:BSPIM:load_cond\/q 1.250
macrocell7 U(3,2) 1 \SPIM:BSPIM:load_cond\ \SPIM:BSPIM:load_cond\/q \SPIM:BSPIM:load_cond\/main_8 2.286
macrocell7 U(3,2) 1 \SPIM:BSPIM:load_cond\ HOLD 0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:sync_3\/out \SPIS:BSPIS:es3:SPISlave:mosi_buf_overrun_fin\/main_0 3.827
Type Location Fanout Instance/Net Source Dest Delay (ns)
synccell U(3,0) 1 \SPIS:BSPIS:es3:SPISlave:sync_3\ \SPIS:BSPIS:es3:SPISlave:sync_3\/clock \SPIS:BSPIS:es3:SPISlave:sync_3\/out 1.000
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_buf_overrun_reg\ \SPIS:BSPIS:es3:SPISlave:sync_3\/out \SPIS:BSPIS:es3:SPISlave:mosi_buf_overrun_fin\/main_0 2.827
macrocell19 U(3,1) 1 \SPIS:BSPIS:es3:SPISlave:mosi_buf_overrun_fin\ HOLD 0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:sync_1\/out \SPIS:BSPIS:es3:SPISlave:dpcounter_one_reg\/main_0 3.862
Type Location Fanout Instance/Net Source Dest Delay (ns)
synccell U(1,0) 1 \SPIS:BSPIS:es3:SPISlave:sync_1\ \SPIS:BSPIS:es3:SPISlave:sync_1\/clock \SPIS:BSPIS:es3:SPISlave:sync_1\/out 1.000
Route 1 \SPIS:BSPIS:es3:SPISlave:dpcounter_one_fin\ \SPIS:BSPIS:es3:SPISlave:sync_1\/out \SPIS:BSPIS:es3:SPISlave:dpcounter_one_reg\/main_0 2.862
macrocell16 U(1,0) 1 \SPIS:BSPIS:es3:SPISlave:dpcounter_one_reg\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:ld_ident\/q \SPIM:BSPIM:ld_ident\/main_8 3.876
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell6 U(3,2) 1 \SPIM:BSPIM:ld_ident\ \SPIM:BSPIM:ld_ident\/clock_0 \SPIM:BSPIM:ld_ident\/q 1.250
macrocell6 U(3,2) 1 \SPIM:BSPIM:ld_ident\ \SPIM:BSPIM:ld_ident\/q \SPIM:BSPIM:ld_ident\/main_8 2.626
macrocell6 U(3,2) 1 \SPIM:BSPIM:ld_ident\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:state_2\/q \SPIM:BSPIM:ld_ident\/main_0 4.215
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(2,2) 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/clock_0 \SPIM:BSPIM:state_2\/q 1.250
Route 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/q \SPIM:BSPIM:ld_ident\/main_0 2.965
macrocell6 U(3,2) 1 \SPIM:BSPIM:ld_ident\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:state_2\/q \SPIM:BSPIM:state_2\/main_0 4.351
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(2,2) 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/clock_0 \SPIM:BSPIM:state_2\/q 1.250
macrocell12 U(2,2) 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/q \SPIM:BSPIM:state_2\/main_0 3.101
macrocell12 U(2,2) 1 \SPIM:BSPIM:state_2\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:state_2\/q \SPIM:BSPIM:load_cond\/main_0 4.352
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(2,2) 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/clock_0 \SPIM:BSPIM:state_2\/q 1.250
Route 1 \SPIM:BSPIM:state_2\ \SPIM:BSPIM:state_2\/q \SPIM:BSPIM:load_cond\/main_0 3.102
macrocell7 U(3,2) 1 \SPIM:BSPIM:load_cond\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_0 Net_115/main_9 4.534
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,1) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 1.920
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 Net_115/main_9 2.614
macrocell2 U(2,1) 1 Net_115 HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
m_miso(0)/fb \SPIM:BSPIM:sR8:Dp:u0\/route_si 8.623
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell9 P1[5] 1 m_miso(0) m_miso(0)/in_clock m_miso(0)/fb 2.601
Route 1 Net_136 m_miso(0)/fb \SPIM:BSPIM:sR8:Dp:u0\/route_si 6.022
datapathcell1 U(2,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/main_0 2.314
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell13 P5[3] 1 s_mosi(0) s_mosi(0)/in_clock s_mosi(0)/fb 2.692
Route 1 Net_101 s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/main_0 6.269
macrocell20 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\ HOLD 0.000
Clock Skew -6.647
Source Destination Slack (ns) Violation
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 6.673
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 10.822
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ REMOVAL 0.000
Clock Skew -6.647
s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 7.822
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell13 P5[3] 1 s_mosi(0) s_mosi(0)/in_clock s_mosi(0)/fb 2.692
Route 1 Net_101 s_mosi(0)/fb \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_5 6.258
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_5 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -0.060
Clock Skew -6.647
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_2 12.156
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 10.281
macrocell17 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 \SPIS:BSPIS:es3:SPISlave:inv_ss\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_2 2.674
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD 0.000
Clock Skew -6.647
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/enable 12.162
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 10.281
macrocell17 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/main_0 \SPIS:BSPIS:es3:SPISlave:inv_ss\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:inv_ss\ \SPIS:BSPIS:es3:SPISlave:inv_ss\/q \SPIS:BSPIS:es3:SPISlave:BitCounter\/enable 2.680
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ HOLD 0.000
Clock Skew -6.647
Source Destination Slack (ns) Violation
\SPIS:BSPIS:es3:SPISlave:mosi_tmp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 50.671
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell20 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\ \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/clock_0 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/q 1.250
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_tmp\ \SPIS:BSPIS:es3:SPISlave:mosi_tmp\/q \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_4 2.235
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_4 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -0.060
Clock Skew 0.000
Source Destination Slack (ns) Violation
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 49.285
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_3\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 2.557
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -3.390
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 49.286
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_1\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 2.558
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -3.390
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 49.424
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_2\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 2.696
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -3.390
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 49.437
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_0\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 2.709
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/f1_load 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -3.390
Clock Skew 0.000
Source Destination Slack (ns) Violation
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 9.988
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_1\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_2 2.549
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_2 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -0.060
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 9.989
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_3\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_0 2.550
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_0 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -0.060
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 10.129
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_2\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_1 2.690
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -0.060
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 10.151
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_0\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_3 2.712
macrocell21 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/main_3 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\ \SPIS:BSPIS:es3:SPISlave:mosi_to_dp\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/route_si 2.229
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD -0.060
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 11.008
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_3\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 2.557
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD 0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 11.009
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_1\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 2.558
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD 0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 11.147
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_2\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_2 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 2.696
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_1 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD 0.000
Clock Skew 0.000
\SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 11.160
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/clock_n \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 1.920
Route 1 \SPIS:BSPIS:es3:SPISlave:count_0\ \SPIS:BSPIS:es3:SPISlave:BitCounter\/count_0 \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 2.709
macrocell24 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/main_3 \SPIS:BSPIS:es3:SPISlave:tx_load\/q 3.350
Route 1 \SPIS:BSPIS:es3:SPISlave:tx_load\ \SPIS:BSPIS:es3:SPISlave:tx_load\/q \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/cs_addr_0 3.181
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ HOLD 0.000
Clock Skew 0.000
+ Clock To Output Section
+ Clock_1
Source Destination Delay (ns)
Net_115/q m_mosi(0)_PAD 24.452
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(2,1) 1 Net_115 Net_115/clock_0 Net_115/q 1.250
Route 1 Net_115 Net_115/q m_mosi(0)/pin_input 7.524
iocell10 P1[4] 1 m_mosi(0) m_mosi(0)/pin_input m_mosi(0)/pad_out 15.678
Route 1 m_mosi(0)_PAD m_mosi(0)/pad_out m_mosi(0)_PAD 0.000
Clock Clock path delay 0.000
Net_131/q m_clk(0)_PAD 23.209
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell3 U(0,0) 1 Net_131 Net_131/clock_0 Net_131/q 1.250
Route 1 Net_131 Net_131/q m_clk(0)/pin_input 6.578
iocell8 P1[7] 1 m_clk(0) m_clk(0)/pin_input m_clk(0)/pad_out 15.381
Route 1 m_clk(0)_PAD m_clk(0)/pad_out m_clk(0)_PAD 0.000
Clock Clock path delay 0.000
+ CyBUS_CLK
Source Destination Delay (ns)
s_ss(0)/fb s_miso(0)_PAD 38.956
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb Net_108/main_0 12.640
macrocell1 U(1,0) 1 Net_108 Net_108/main_0 Net_108/q 3.350
Route 1 Net_108 Net_108/q s_miso(0)/pin_input 5.431
iocell12 P5[0] 1 s_miso(0) s_miso(0)/pin_input s_miso(0)/pad_out 15.037
Route 1 s_miso(0)_PAD s_miso(0)/pad_out s_miso(0)_PAD 0.000
Clock Clock path delay 0.000
+ s_clk(0)/fb
Source Destination Delay (ns)
\SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/so_comb s_miso(0)_PAD 48.637
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\ \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/clock \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/so_comb 12.160
Route 1 \SPIS:BSPIS:es3:SPISlave:miso_from_dp\ \SPIS:BSPIS:es3:SPISlave:sR8:Dp:u0\/so_comb Net_108/main_1 6.012
macrocell1 U(1,0) 1 Net_108 Net_108/main_1 Net_108/q 3.350
Route 1 Net_108 Net_108/q s_miso(0)/pin_input 5.431
iocell12 P5[0] 1 s_miso(0) s_miso(0)/pin_input s_miso(0)/pad_out 15.037
Route 1 s_miso(0)_PAD s_miso(0)/pad_out s_miso(0)_PAD 0.000
Clock Clock path delay 6.647
+ Asynchronous Constraints
+ Recovery
Path Delay Requirement : 41.6667ns
Affects clock : CyBUS_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 149.858 MHz 6.673 34.994
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 10.822
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ RECOVERY -0.000
Clock Skew -6.647
+ Removal
Source Destination Slack (ns) Violation
s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 6.673
Type Location Fanout Instance/Net Source Dest Delay (ns)
iocell14 P2[7] 1 s_ss(0) s_ss(0)/in_clock s_ss(0)/fb 2.498
Route 1 Net_103 s_ss(0)/fb \SPIS:BSPIS:es3:SPISlave:BitCounter\/reset 10.822
count7cell U(2,0) 1 \SPIS:BSPIS:es3:SPISlave:BitCounter\ REMOVAL 0.000
Clock Skew -6.647