/* ###*B*### * Erika Enterprise, version 3 * * Copyright (C) 2017 Evidence s.r.l. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or (at * your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License, version 2, for more details. * * You should have received a copy of the GNU General Public License, * version 2, along with this program; if not, see * . * * This program is distributed to you subject to the following * clarifications and special exceptions to the GNU General Public * License, version 2. * * THIRD PARTIES' MATERIALS * * Certain materials included in this library are provided by third * parties under licenses other than the GNU General Public License. You * may only use, copy, link to, modify and redistribute this library * following the terms of license indicated below for third parties' * materials. * * In case you make modified versions of this library which still include * said third parties' materials, you are obligated to grant this special * exception. * * The complete list of Third party materials allowed with ERIKA * Enterprise version 3, together with the terms and conditions of each * license, is present in the file THIRDPARTY.TXT in the root of the * project. * ###*E*### */ /** * * This file derives from a modification of the TASKING linker scripts, * distributed under the following license: * * TASKING VX-toolset for TriCore * Eclipse project linker script file * */ /** \file ee_tc_tasking_flash.lsl * \brief Linker script file for TASKING compiler (no iLLD integration) * \author Errico Guidieri * \date 2019 */ #if (!defined(USTACK_TC0)) #define USTACK_TC0 4k #endif /* !USTACK_TC0 */ //#if (defined(OSEE_TC_LINK_BMHD)) /* We declare that we want generate and link the Boot Mode Headers */ /* #define __BMHD0_CONFIG __BMHD_GENERATE #define __BMHD1_CONFIG __BMHD_GENERATE #define __BMHD2_CONFIG __BMHD_GENERATE #define __BMHD3_CONFIG __BMHD_GENERATE #endif */ /* OSEE_TC_LINK_BMHD */ # define TRAPTAB0 0x70100000+0x1F00 # define INTTAB0 (TRAPTAB0+0x100) # define TRAPTAB1 0x60100000+0x1F00 # define INTTAB1 (TRAPTAB1+0x100) # define TRAPTAB2 0x50100000+0x1F00 # define INTTAB2 (TRAPTAB2+0x100) # define TRAPTAB3 0x40100000+0x1F00 # define INTTAB3 (TRAPTAB3+0x100) # define TRAPTAB4 0x30100000+0x1F00 # define INTTAB4 (TRAPTAB4+0x100) # define TRAPTAB5 0x10100000+0x1F00 # define INTTAB5 (TRAPTAB5+0x100) # define RESET 0x70100000 # define TRAPTAB TRAPTAB0 # define INTTAB INTTAB0 #if defined(__PROC_TC39X__) #include "tc39x.lsl" /* N.B. abs18 addressing is broken (especially in for AURIX 2G). I forced it off. */ section_layout mpe:vtc:linear { /* map .bss and .data in not cached address space otherwise all sort of troubles happen group liner_not_cached (ordered, run_addr=mem:mpe:lmuram0/not_cached) { select "*(.bss|.bss*)" (attributes=-x+r+w); select "*(.data|.data*)" (attributes=-x+r+w); } */ group liner_not_cached_bss_trace (ordered, run_addr=mem:mpe:olda/not_cached) { select "*(.bss.arti.pls_trace)" (attributes=-x+r+w); } group liner_not_cached_bss_other (ordered, run_addr=mem:mpe:lmuram0/not_cached) { select "*(.bss|.bss*)" (attributes=-x+r+w); } group liner_not_cached_data (ordered, run_addr=mem:mpe:lmuram0/not_cached) { select "*(.data|.data*)" (attributes=-x+r+w); } group tc0_liner_const (run_addr=mem:mpe:pspr0, attributes=rw) { select "*(.CPU0.ee_kernel_const|.CPU0.ee_kernel_const*)"; } group tc0_liner_code (run_addr=mem:mpe:pspr0) { select "*(.CPU0.code|.CPU0.code*)"; } group tc1_liner_const (run_addr=mem:mpe:pspr1, attributes=rw) { select "*(.CPU1.ee_kernel_const|.CPU1.ee_kernel_const*)"; } group tc1_liner_code (run_addr=mem:mpe:pspr1) { select "*(.CPU1.code|.CPU1.code*)"; } group tc2_liner_const (run_addr=mem:mpe:pspr2, attributes=rw) { select "*(.CPU2.ee_kernel_const|.CPU2.ee_kernel_const*)"; } group tc2_liner_code (run_addr=mem:mpe:pspr2) { select "*(.CPU2.code|.CPU2.code*)"; } group tc3_liner_const (run_addr=mem:mpe:pspr3, attributes=rw) { select "*(.CPU3.ee_kernel_const|.CPU3.ee_kernel_const*)"; } group tc3_liner_code (run_addr=mem:mpe:pspr3) { select "*(.CPU3.code|.CPU3.code*)"; } group tc4_liner_const (run_addr=mem:mpe:pspr4, attributes=rw) { select "*(.CPU4.ee_kernel_const|.CPU4.ee_kernel_const*)"; } group tc4_liner_code (run_addr=mem:mpe:pspr4) { select "*(.CPU4.code|.CPU4.code*)"; } group tc5_liner_const (run_addr=mem:mpe:pspr5, attributes=rw) { select "*(.CPU6.ee_kernel_const|.CPU6.ee_kernel_const*)"; } group tc5_liner_code (run_addr=mem:mpe:pspr5) { select "*(.CPU6.code|.CPU6.code*)"; } } section_layout mpe:tc0:linear { group tc0_private_code (run_addr = mem:mpe:pspr0) { select "*(.text|.text*)"; } } section_layout mpe:tc1:linear { group tc1_private_code (run_addr = mem:mpe:pspr1) { select "*(.text|.text*)"; } } section_layout mpe:tc2:linear { group tc2_private_code (run_addr = mem:mpe:pspr2) { select "*(.text|.text*)"; } } section_layout mpe:tc3:linear { group tc3_private_code (run_addr = mem:mpe:pspr3) { select "*(.text|.text*)"; } } section_layout mpe:tc4:linear { group tc4_private_code (run_addr = mem:mpe:pspr4) { select "*(.text|.text*)"; } } section_layout mpe:tc5:linear { group tc6_private_code (run_addr = mem:mpe:pspr5) { select "*(.text|.text*)"; } } #else #include #endif