Static Timing Analysis

Project : HOPERF_TX
Build Time : 10/18/19 12:00:02
Device : CY8C5888LTI-LP097
Temperature : -40C - 85/125C
VDDA : 5.00
VDDABUF : 5.00
VDDD : 5.00
VDDIO0 : 5.00
VDDIO1 : 5.00
VDDIO2 : 5.00
VDDIO3 : 5.00
VUSB : 5.00
Voltage : 5.0
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
CyILO CyILO 1.000 kHz 1.000 kHz N/A
CyIMO CyIMO 3.000 MHz 3.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
CyBUS_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
Clock CyMASTER_CLK 2.000 MHz 2.000 MHz 69.185 MHz
CyPLL_OUT CyPLL_OUT 24.000 MHz 24.000 MHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 500ns(2 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\SPIM:BSPIM:BitCounter\/count_3 \SPIM:BSPIM:sR8:Dp:u0\/f1_load 69.185 MHz 14.454 485.546
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_3 1.940
Route 1 \SPIM:BSPIM:count_3\ \SPIM:BSPIM:BitCounter\/count_3 \SPIM:BSPIM:load_rx_data\/main_1 2.998
macrocell1 U(3,0) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_1 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:sR8:Dp:u0\/f1_load 3.316
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 2.850
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_1 \SPIM:BSPIM:sR8:Dp:u0\/f1_load 69.257 MHz 14.439 485.561
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_1 1.940
Route 1 \SPIM:BSPIM:count_1\ \SPIM:BSPIM:BitCounter\/count_1 \SPIM:BSPIM:load_rx_data\/main_3 2.983
macrocell1 U(3,0) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_3 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:sR8:Dp:u0\/f1_load 3.316
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 2.850
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_2 \SPIM:BSPIM:sR8:Dp:u0\/f1_load 70.681 MHz 14.148 485.852
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_2 1.940
Route 1 \SPIM:BSPIM:count_2\ \SPIM:BSPIM:BitCounter\/count_2 \SPIM:BSPIM:load_rx_data\/main_2 2.692
macrocell1 U(3,0) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_2 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:sR8:Dp:u0\/f1_load 3.316
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 2.850
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:sR8:Dp:u0\/f1_load 71.311 MHz 14.023 485.977
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_4 1.940
Route 1 \SPIM:BSPIM:count_4\ \SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:load_rx_data\/main_0 2.567
macrocell1 U(3,0) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_0 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:sR8:Dp:u0\/f1_load 3.316
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 2.850
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:sR8:Dp:u0\/f1_load 71.388 MHz 14.008 485.992
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 1.940
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:load_rx_data\/main_4 2.552
macrocell1 U(3,0) 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/main_4 \SPIM:BSPIM:load_rx_data\/q 3.350
Route 1 \SPIM:BSPIM:load_rx_data\ \SPIM:BSPIM:load_rx_data\/q \SPIM:BSPIM:sR8:Dp:u0\/f1_load 3.316
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 2.850
Clock Skew 0.000
\SPIM:BSPIM:sR8:Dp:u0\/f1_blk_stat_comb \SPIM:BSPIM:RxStsReg\/status_6 74.184 MHz 13.480 486.520
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ \SPIM:BSPIM:sR8:Dp:u0\/clock \SPIM:BSPIM:sR8:Dp:u0\/f1_blk_stat_comb 3.580
Route 1 \SPIM:BSPIM:rx_status_4\ \SPIM:BSPIM:sR8:Dp:u0\/f1_blk_stat_comb \SPIM:BSPIM:rx_status_6\/main_5 3.745
macrocell4 U(3,1) 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/main_5 \SPIM:BSPIM:rx_status_6\/q 3.350
Route 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/q \SPIM:BSPIM:RxStsReg\/status_6 2.305
statusicell2 U(3,1) 1 \SPIM:BSPIM:RxStsReg\ SETUP 0.500
Clock Skew 0.000
\SPIM:BSPIM:sR8:Dp:u0\/f0_blk_stat_comb \SPIM:BSPIM:state_2\/main_8 77.646 MHz 12.879 487.121
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ \SPIM:BSPIM:sR8:Dp:u0\/clock \SPIM:BSPIM:sR8:Dp:u0\/f0_blk_stat_comb 3.580
Route 1 \SPIM:BSPIM:tx_status_1\ \SPIM:BSPIM:sR8:Dp:u0\/f0_blk_stat_comb \SPIM:BSPIM:state_2\/main_8 5.789
macrocell7 U(3,0) 1 \SPIM:BSPIM:state_2\ SETUP 3.510
Clock Skew 0.000
\SPIM:BSPIM:sR8:Dp:u0\/f0_blk_stat_comb \SPIM:BSPIM:state_1\/main_8 77.646 MHz 12.879 487.121
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ \SPIM:BSPIM:sR8:Dp:u0\/clock \SPIM:BSPIM:sR8:Dp:u0\/f0_blk_stat_comb 3.580
Route 1 \SPIM:BSPIM:tx_status_1\ \SPIM:BSPIM:sR8:Dp:u0\/f0_blk_stat_comb \SPIM:BSPIM:state_1\/main_8 5.789
macrocell8 U(3,0) 1 \SPIM:BSPIM:state_1\ SETUP 3.510
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_1 \SPIM:BSPIM:RxStsReg\/status_6 84.545 MHz 11.828 488.172
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_1 1.940
Route 1 \SPIM:BSPIM:count_1\ \SPIM:BSPIM:BitCounter\/count_1 \SPIM:BSPIM:rx_status_6\/main_3 3.733
macrocell4 U(3,1) 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/main_3 \SPIM:BSPIM:rx_status_6\/q 3.350
Route 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/q \SPIM:BSPIM:RxStsReg\/status_6 2.305
statusicell2 U(3,1) 1 \SPIM:BSPIM:RxStsReg\ SETUP 0.500
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_3 \SPIM:BSPIM:RxStsReg\/status_6 84.559 MHz 11.826 488.174
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_3 1.940
Route 1 \SPIM:BSPIM:count_3\ \SPIM:BSPIM:BitCounter\/count_3 \SPIM:BSPIM:rx_status_6\/main_1 3.731
macrocell4 U(3,1) 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/main_1 \SPIM:BSPIM:rx_status_6\/q 3.350
Route 1 \SPIM:BSPIM:rx_status_6\ \SPIM:BSPIM:rx_status_6\/q \SPIM:BSPIM:RxStsReg\/status_6 2.305
statusicell2 U(3,1) 1 \SPIM:BSPIM:RxStsReg\ SETUP 0.500
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:state_2\/main_7 3.163
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 0.620
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:state_2\/main_7 2.543
macrocell7 U(3,0) 1 \SPIM:BSPIM:state_2\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:state_1\/main_7 3.163
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 0.620
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:state_1\/main_7 2.543
macrocell8 U(3,0) 1 \SPIM:BSPIM:state_1\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:ld_ident\/main_7 3.163
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 0.620
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 \SPIM:BSPIM:ld_ident\/main_7 2.543
macrocell12 U(3,0) 1 \SPIM:BSPIM:ld_ident\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_0 Net_30/main_9 3.172
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_0 0.620
Route 1 \SPIM:BSPIM:count_0\ \SPIM:BSPIM:BitCounter\/count_0 Net_30/main_9 2.552
macrocell6 U(3,0) 1 Net_30 HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:state_2\/main_3 3.173
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_4 0.620
Route 1 \SPIM:BSPIM:count_4\ \SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:state_2\/main_3 2.553
macrocell7 U(3,0) 1 \SPIM:BSPIM:state_2\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:state_1\/main_3 3.173
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_4 0.620
Route 1 \SPIM:BSPIM:count_4\ \SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:state_1\/main_3 2.553
macrocell8 U(3,0) 1 \SPIM:BSPIM:state_1\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:ld_ident\/main_3 3.173
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_4 0.620
Route 1 \SPIM:BSPIM:count_4\ \SPIM:BSPIM:BitCounter\/count_4 \SPIM:BSPIM:ld_ident\/main_3 2.553
macrocell12 U(3,0) 1 \SPIM:BSPIM:ld_ident\ HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_4 Net_30/main_5 3.187
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_4 0.620
Route 1 \SPIM:BSPIM:count_4\ \SPIM:BSPIM:BitCounter\/count_4 Net_30/main_5 2.567
macrocell6 U(3,0) 1 Net_30 HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_2 Net_30/main_7 3.312
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_2 0.620
Route 1 \SPIM:BSPIM:count_2\ \SPIM:BSPIM:BitCounter\/count_2 Net_30/main_7 2.692
macrocell6 U(3,0) 1 Net_30 HOLD 0.000
Clock Skew 0.000
\SPIM:BSPIM:BitCounter\/count_2 \SPIM:BSPIM:state_2\/main_5 3.313
Type Location Fanout Instance/Net Source Dest Delay (ns)
count7cell U(3,0) 1 \SPIM:BSPIM:BitCounter\ \SPIM:BSPIM:BitCounter\/clock \SPIM:BSPIM:BitCounter\/count_2 0.620
Route 1 \SPIM:BSPIM:count_2\ \SPIM:BSPIM:BitCounter\/count_2 \SPIM:BSPIM:state_2\/main_5 2.693
macrocell7 U(3,0) 1 \SPIM:BSPIM:state_2\ HOLD 0.000
Clock Skew 0.000
+ Input To Clock Section
+ Clock
Source Destination Delay (ns)
MISO(0)_PAD \SPIM:BSPIM:sR8:Dp:u0\/route_si 16.023
Type Location Fanout Instance/Net Source Dest Delay (ns)
Route 1 MISO(0)_PAD MISO(0)_PAD MISO(0)/pad_in 0.000
iocell1 P3[3] 1 MISO(0) MISO(0)/pad_in MISO(0)/fb 6.651
Route 1 Net_20 MISO(0)/fb \SPIM:BSPIM:sR8:Dp:u0\/route_si 5.872
datapathcell1 U(3,1) 1 \SPIM:BSPIM:sR8:Dp:u0\ SETUP 3.500
Clock Clock path delay 0.000
+ Clock To Output Section
+ Clock
Source Destination Delay (ns)
Net_107/q nCS(0)_PAD 22.897
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell10 U(3,1) 1 Net_107 Net_107/clock_0 Net_107/q 1.250
Route 1 Net_107 Net_107/q nCS(0)/pin_input 6.486
iocell11 P3[7] 1 nCS(0) nCS(0)/pin_input nCS(0)/pad_out 15.161
Route 1 nCS(0)_PAD nCS(0)/pad_out nCS(0)_PAD 0.000
Clock Clock path delay 0.000
Net_31/q SCK(0)_PAD 22.744
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,1) 1 Net_31 Net_31/clock_0 Net_31/q 1.250
Route 1 Net_31 Net_31/q SCK(0)/pin_input 6.156
iocell3 P3[5] 1 SCK(0) SCK(0)/pin_input SCK(0)/pad_out 15.338
Route 1 SCK(0)_PAD SCK(0)/pad_out SCK(0)_PAD 0.000
Clock Clock path delay 0.000
Net_30/q MOSI(0)_PAD 21.941
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell6 U(3,0) 1 Net_30 Net_30/clock_0 Net_30/q 1.250
Route 1 Net_30 Net_30/q MOSI(0)/pin_input 5.712
iocell2 P3[1] 1 MOSI(0) MOSI(0)/pin_input MOSI(0)/pad_out 14.979
Route 1 MOSI(0)_PAD MOSI(0)/pad_out MOSI(0)_PAD 0.000
Clock Clock path delay 0.000