TLx493D 3D Hall Sensor Generic Library  1.3
Generic library for the TLx493D 3D Hall sensor family
TLV_A1B6_defines.h
Go to the documentation of this file.
1 /*
2 *****************************************************************************
3 * Copyright (C) 2019 Infineon Technologies AG. All rights reserved.
4 *
5 * Infineon Technologies AG (INFINEON) is supplying this file for use
6 * exclusively with Infineon's products. This file can be freely
7 * distributed within development tools and software supporting such microcontroller
8 * products.
9 *
10 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
11 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
13 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR DIRECT, INDIRECT, INCIDENTAL,
14 * ASPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
15 *
16 ******************************************************************************
17 */
18 
29 #ifndef SRC_TLX493D_TLV_A1B6_DRIVER_TLV_A1B6_DEFINES_H_
30 #define SRC_TLX493D_TLV_A1B6_DRIVER_TLV_A1B6_DEFINES_H_
31 
32 #include <stdint.h>
33 
34 
36 #define TLV493D_A1B6_I2C_RESET_ADDR (0x00U)
37 #define TLV493D_A1B6_I2C_RECOV_ADDR (0xFFU)
38 #define TLV493D_A1B6_I2C_DEFAULT_ADDR_HIGH (0xBCU)
39 #define TLV493D_A1B6_I2C_DEFAULT_ADDR_LOW (0x3EU)
40 
42 
43 // the number of readable registers of the TLV493D-A1B6 sensor
44 #define TLV493D_A1B6_READ_REGS_COUNT (0x0AU)
45 
46 // ----- { Bx } -----
47 #define TLV493D_A1B6_Bx_REG (0x0U)
48 
49 // ----- { By } -----
50 #define TLV493D_A1B6_By_REG (0x1U)
51 
52 // ----- { Bz } -----
53 #define TLV493D_A1B6_Bz_REG (0x2U)
54 
55 // ----- { Temp Register } -----
56 #define TLV493D_A1B6_Temp_REG (0x3U)
57 #define TLV493D_A1B6_Temp_Temp_POS (0x4U)
58 #define TLV493D_A1B6_Temp_Temp_MSK (0xFU << 4)
59 #define TLV493D_A1B6_Temp_FRM_POS (0x2U)
60 #define TLV493D_A1B6_Temp_FRM_MSK (0x3U << 2)
61 #define TLV493D_A1B6_Temp_CH_POS (0x0U)
62 #define TLV493D_A1B6_Temp_CH_MSK (0x3U)
63 
64 // ----- { Bx2 Register } -----
65 #define TLV493D_A1B6_Bx2_REG (0x4U)
66 
67 #define TLV493D_A1B6_Bx2_Bx_POS (0x4U)
68 #define TLV493D_A1B6_Bx2_Bx_MSK (0xFU << 4)
69 
70 #define TLV493D_A1B6_Bx2_By_POS (0x0U)
71 #define TLV493D_A1B6_Bx2_By_MSK (0xFU)
72 
73 // ----- { Bz2 Register } -----
74 #define TLV493D_A1B6_Bz2_REG (0x5U)
75 
76 #define TLV493D_A1B6_Bz2_Reserved_POS (0x7U)
77 #define TLV493D_A1B6_Bz2_Reserved_MSK (0x1U << 7)
78 
79 #define TLV493D_A1B6_Bz2_T_POS (0x6U)
80 #define TLV493D_A1B6_Bz2_T_MSK (0x1U << 6)
81 #define TLV493D_A1B6_Bz2_F_POS (0x5U)
82 #define TLV493D_A1B6_Bz2_F_MSK (0x1U << 5)
83 
84 #define TLV493D_A1B6_Bz2_PD_POS (0x4U)
85 #define TLV493D_A1B6_Bz2_PD_MSK (0x1U << 4)
86 
87 #define TLV493D_A1B6_Bz2_Bz_POS (0x0U)
88 #define TLV493D_A1B6_Bz2_Bz_MSK (0xFU)
89 
90 // ----- { Temp2 Register } -----
91 #define TLV493D_A1B6_Temp2_REG (0x6U)
92 #define TLV493D_A1B6_Temp2_Temp_POS (0x0U)
93 #define TLV493D_A1B6_Temp2_Temp_MSK (0xFF)
94 
95 // ----- { FactSet1 Register } -----
96 #define TLV493D_A1B6_FactSet1_REG (0x7U)
97 #define TLV493D_A1B6_FaceSet1_Reserved_POS (0x0U)
98 #define TLV493D_A1B6_FaceSet1_Reserved_MSK (0xFF)
99 
100 // ----- { FactSet2 Register } -----
101 #define TLV493D_A1B6_FactSet2_REG (0x8U)
102 #define TLV493D_A1B6_FaceSet2_Reserved_POS (0x0U)
103 #define TLV493D_A1B6_FaceSet2_Reserved_MSK (0xFF)
104 
105 // ----- { FactSet3 Register } -----
106 #define TLV493D_A1B6_FactSet3_REG (0x9U)
107 #define TLV493D_A1B6_FaceSet3_Reserved_POS (0x0U)
108 #define TLV493D_A1B6_FaceSet3_Reserved_MSK (0xFF)
109 
111 
112 // the number of writable registers of the TLV493D-A1B6 sensor
113 #define TLV493D_A1B6_WRITE_REGS_COUNT (0x04U)
114 
115 // ----- { Res Register } -----
116 #define TLV493D_A1B6_Res_REG (0x0U)
117 #define TLV493D_A1B6_Res_Reserved_POS (0x0U)
118 #define TLV493D_A1B6_Res_Reserved_MSK (0xFF)
119 
120 // ----- { MOD1 Register } -----
121 #define TLV493D_A1B6_MOD1_REG (0x1U)
122 
123 #define TLV493D_A1B6_MOD1_P_POS (0x7U)
124 #define TLV493D_A1B6_MOD1_P_MSK (0x1U << 7)
125 
126 #define TLV493D_A1B6_MOD1_IICAddr_POS (0x5U)
127 #define TLV493D_A1B6_MOD1_IICAddr_MSK (0x3U << 5)
128 #define TLV493D_A1B6_MOD1_IICAddr_16_94 (0x3U << 5)
129 #define TLV493D_A1B6_MOD1_IICAddr_1E_9C (0x2U << 5)
130 #define TLV493D_A1B6_MOD1_IICAddr_36_B4 (0x1U << 5)
131 #define TLV493D_A1B6_MOD1_IICAddr_3E_BC (0x0U << 5)
132 
133 #define TLV493D_A1B6_MOD1_Reserved_POS (0x3U)
134 #define TLV493D_A1B6_MOD1_Reserved_MSK (0x3U << 3)
135 
136 #define TLV493D_A1B6_MOD1_INT_POS (0x2U)
137 #define TLV493D_A1B6_MOD1_INT_MSK (0x1U << 2)
138 #define TLV493D_A1B6_MOD1_INT_ENABLE (0x1U << 2)
139 #define TLV493D_A1B6_MOD1_INT_DISABLE (0x0U << 2)
140 
141 #define TLV493D_A1B6_MOD1_FAST_POS (0x1U)
142 #define TLV493D_A1B6_MOD1_FAST_MSK (0x1U << 1)
143 #define TLV493D_A1B6_MOD1_FAST_ENABLE (0x1U << 1)
144 #define TLV493D_A1B6_MOD1_FAST_DISABLE (0x0U << 1)
145 
146 #define TLV493D_A1B6_MOD1_LOW_POS (0x0U)
147 #define TLV493D_A1B6_MOD1_LOW_MSK (0x1U)
148 #define TLV493D_A1B6_MOD1_LOW_ENABLE (0x1U)
149 #define TLV493D_A1B6_MOD1_LOW_DISABLE (0x0U)
150 
151 // ----- { Res2 Register } -----
152 #define TLV493D_A1B6_Res2_REG (0x2U)
153 #define TLV493D_A1B6_Res2_Reserved_POS (0x0U)
154 #define TLV493D_A1B6_Res2_Reserved_MSK (0xFF)
155 
156 // ----- { MOD2 Register } -----
157 #define TLV493D_A1B6_MOD2_REG (0x3U)
158 
159 #define TLV493D_A1B6_MOD2_T_POS (0x7U)
160 #define TLV493D_A1B6_MOD2_T_MSK (0x1U << 7)
161 #define TLV493D_A1B6_MOD2_T_DISABLE (0x1U << 7)
162 #define TLV493D_A1B6_MOD2_T_ENABLE (0x0U << 7)
163 
164 #define TLV493D_A1B6_MOD2_LP_POS (0x6U)
165 #define TLV493D_A1B6_MOD2_LP_MSK (0x1U << 6)
166 #define TLV493D_A1B6_MOD2_LP_ULTRA_LOW_POWER (0x0U << 6)
167 #define TLV493D_A1B6_MOD2_LP_LOW_POWER (0x1U << 6)
168 
169 #define TLV493D_A1B6_MOD2_PT_POS (0x5U)
170 #define TLV493D_A1B6_MOD2_PT_MSK (0x1U << 5)
171 #define TLV493D_A1B6_MOD2_PT_DISABLE (0x0U << 5)
172 #define TLV493D_A1B6_MOD2_PT_ENABLE (0x1U << 5)
173 
174 #define TLV493D_A1B6_MOD2_Reserved_POS (0x0U)
175 #define TLV493D_A1B6_MOD2_Reserved_MSK (0x1FU)
176 
177 #endif /* SRC_TLX493D_TLV_A1B6_DRIVER_TLV_A1B6_DEFINES_H_ */