I have a question about "user_data" parameter in interrupt handler.
In the prototype of wiced_hal_gpio_register_pin_for_interrupt() API, 3'rd param(void *userdata) is "Will be passed back to userfn as-is". However, when I test it with following test code, it looks not working. I guessed "udata" must be printed out "123" but printed out "168". I am not sure if my test code is incorrect or it's SDK bug.
Q) May I ask what's wrong with following test code?
H/W : CYW920706WCDEVAL
S/W : WICED SDK 6.4.0
uint8_t my_data = 123;
wiced_hal_gpio_register_pin_for_interrupt( WICED_GPIO_BUTTON, headset_interrupt_handler, (void *)&my_data );
wiced_hal_gpio_configure_pin( WICED_GPIO_BUTTON, WICED_GPIO_BUTTON_SETTINGS( GPIO_EN_INT_BOTH_EDGE ), WICED_GPIO_BUTTON_DEFAULT_STATE );
void headset_interrupt_handler( void *user_data, uint8_t value )
WICED_BT_TRACE("[%s] enter...\n", __FUNCTION__);
if ( wiced_hal_gpio_get_pin_input_status(WICED_GPIO_BUTTON) == BUTTON_PRESSED )
WICED_BT_TRACE( "Button pressed\n");
uint8_t udata = (uint8_t *)user_data;
WICED_BT_TRACE( "Button released\n" );
WICED_BT_TRACE( "udata = %d\n", udata);
I am trying with small steps to operate the DMA on I2S, so I have an array of 40 values (0 through 0x27) to write to the I2S-TX through DMA. Then I read the I2S-SDO line on logic analyzer.
First, to configure the UDB datapath to be 32-bit wide to have 4-words deep FIFO, do it just configure the data_size to "word" ? or do I have to manually configure some register ?
I set up the system as follows:
Data to send: uint32_t txBuff
Tx-only, 24-bits, period 64-bits
In case of I2S set to 16-bits: The output reads 2 consecutive elements from the array at a time, concatenates them and and sends them to the I2S.
In case of I2S set to 24-bits: The output reads 2 consecutive elements from the array at a time, concatenates them and and sends them to the I2S, and skips other some elements in the array:
I expired all the trials and errors and the resources in TRM and datasheets,
Any clue what is wrong with the setup ?
The CYBLE-012011 BLE modules uses digitally tuned trimmer caps on the xtal to be on frequency. The example projects leave you with values of 0x2d6a (8.2pF, 14.3 pF) which by my measurements is way off by +100 ppm. There is a KBA that tells you to make it 0xbcbc (17.8 pF, 17.8 pF) which by my measurements is off by +19 ppm. https://community.infineon.com/t5/Knowledge-Base-Articles/ECO-Capacitance-Trim-Values-for-EZ-BLE-Modules-KBA218990/ta-p/249311
I'm using the raw PPS off a locked GPS (not a GPSDO) to gate the 24 MHz and measure the frequency. I've got three brand new CYBLE-012011 on completely different layouts and they all measure exactly +19 ppm hot using the recommended 0xbcbc. I find that 0xd9d9 (20.7 pF, 20.7 pF) gets them right around 0 ppm. Even with jitter a locked GPS PPS should give you significantly less than 1 ppm error.
SInce the KBA is from 4 years ago was there a change in the xtal in the module? I notice that some other modules have a recommended 0xd0d0. In any case, 2 x 20 pF on a xtal seems like a lot to me.
Could someone with a calibrated frequency counter double-check my results?Show Less
I need to implement an additional I2S port on the PSoC-6, my PSoC has only a single I2S module.
I found few resources for UDB I2S, and I have a few questions:
What I am trying to do:
1- I need left and right interleaved (24-bits data, 64-bits word length) --> This makes up 8-bytes (UDB FIFO is only 4-bytes).
2- I need to stream 160-bytes at at time.
3- I can use DMA.
4- UDB FIFO is 4-bytes, interleaved between left and right.
5- UDB FIFO interrupts is for non-empty or overflow.
Given those conditions (interrupt, buffer size, data format):
1- How can I capture the 160-bytes, which interrupt to use ?
2- And, how can I figure out which byte is received (is it left or right and which byte within the 4-bytes it is).
I'm picking up a project and haven't used the Cypress PSOC parts before. I have two board variants with two different PSOC 4 BLE parts in them: CYBLE-224116-01 and CYBLE-224110-00. I have an iOS app I need to update to make FW upgrades to these units and it needs to be able to determine which part is being targeted.
My first round of research hasn't turned up how to retrieve a hardware version string from the unit. I suspect that it is stored as a default characteristic on FW images generated by PSOC creator...but I'm still very new. What's an easy what to do this?Show Less
Dear Team Cypress,
Can CY8C4125PVE-S422 , together with Motor driver, control Stepper Motor through SPI communication for micro-stepping?
Can CY8C4125PVE-S422 and motor driver be used to achieve microstepping control feature with SPI to Stepper Motor?
The datasheet for the part, CY8C4125PVE-S422 ,follows: https://www.cypress.com/file/429186/download
Thank you for your help.
Do you have any job boards as I loking for P SOC6 with Bluetooth experence in Australia or new zealand.
I have made schematic and have modified Tutorial videos to make sure hardware is Ok.
I need expernced progrmmer in PSOC creator 4.4 to finish project.Show Less
We are not able to set 'WEL' bit in Status Register 1, or even read back what is written in Memory. We are using a FPGA to interface with Serial Flash S25FL256S... . Below is the sequence of operations.
I am attaching some waveforms showing the operations. The file names of waveforms indicate the type of operation being performed. These waveforms are from Xilinx Vivado ILA. The signal names are mapped as below.
Below is some information about the operations shown in the waveforms.
1) Read JED ID & Issue WREN.jpg: This file shows that reading of JEDEC ID is working. After reading the ID, we are issuing 'WREN' Instruction to set the 'WEL' bit.
2) Erase Flash Array (P4E).jpg: Before writing we are erasing the sector at address 0x0.
3) Read Status register 1, RDSR1 .jpg: Reading Status Register 1, read back data is 0x0.
4) Page Program & Read Status Register.jpg: Write data to memory and read Status Register 1, read back data is still 0x0, WIP bit not set.
5) Read Status Register & Read Flash Array.jpg: Read status register and read data from memory. Status register is still 0x0 and data read from memory is all 0xFF. Four bytes were written and four bytes read back.
Did we miss anything from the datasheet? Are we doing something incorrectly? Please help!
Thank you so much.
Hi everyone. I have the following issue. I just installed the new version of IDE Modus Toolbox in 2.4.
After going through the entire installation procedure on my Linux Manjaro machine.
My sample applications compile fine, but when I do Debug or Program it throws the following error and does not allow me to program my PSoC6.
Could not determine GDB version after sending: /home/user/ModusToolbox/tools_2.4/gcc/bin/arm-none-eabi-gdb --version, response:
I want to emphasize that I had previously installed the Modus Toolbox 2.3 version and it was working fine
Can you guide me to solve this problem, please?Show Less