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Hi Guys,
i am testing this radar to detect only the presence in front off the device.
i am configuring it with Infineon radar software on windows.
When i change the state of 'Presence detect on/off' and i set it on "ON" mode and even if the module give succes setting when i check the status it remains on "OFF".
I am running on Ver 1.5.0.
I need to detect only the presence of a car in front of the radar, about how to set it?
Do you have some advice in order to set it correctly?
thank's in advance.
Claudio S.
Show Less请教各位大佬一个问题,我用了一个三相桥芯片6EDL04N02PR
关于6EDL04系列芯片,手册给出的输出电流值为Io+=165mA,Io-=375mA.这两个电流代表了驱动器的输出电流峰值大小吗?Io+的测试条件是负载CL=10nF,这是在不外加栅极电阻情况下,直接加一个电容负载进行测试的吗?Iopeak+写的测试条件为RL=0,这是代表将栅极驱动器的输出直接和地短路进行测试的吗?
下图中给出了栅极驱动器的内部电阻,对于这款芯片,开通和关断的时候,外接栅极电阻应该选择多大?
下面是datasheet和芯片技术说明的链接,
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In my application, I have the CYPD3171 powered from VBUS_IN_DISCHARGE. It generates 3.3V on VDDD from an internal regulator. The datasheet says not to use this to power external devices. However, I am using it for the pull up resistors for I2c communications. The datasheet says that GPIO cannot handle having a voltage on I2C lines when the CYPD3171 is powered down, so I figured pulling up to VDDD is ok since it is internally generated. Every 32 ms or so, the voltage on VDDD sags down from 3.3V to approximately 1.5V before rapidly shooting back up to 3.3V. If I increase the capacitance on VDDD, it still sags to 1.5V but the amount of time it takes to drop from 3.3 to 1.5 increases, which seems to suggest that there is some feedback on VDDD and the voltage is allowed to drop to 1.5V on purpose. Actually, there is a voltage spike before the drop (on the EVK as well as my board with a 1 uF and 100 nF cap installed on VDDD), but the spike goes away with a 4.7 uF capacitor added to VDDD. I started a new example project (power adapter "cla" project) for the CYPD3171 and flashed it to the CY4532 EVK. I powered the EVK from VBUS_IN on J4 (J2, J3, J4 in default position, Jumper on J6 removed, J5 and J7 removed) and saw the same exact behavior on VDDD. Enabling or disabling deep sleep has no effect on this. Is there some change I need to make to the firmware to support being powered from VBUS_IN_DISCHARGE? Thanks.
Show LessHello community,
I am working with the CY4532 and the PSoC Creator. When building my software a default EZ-PD configuration gets written into the HEX-file. I know that I can alter the configuration with the EZ-PD configuration utility but I would rather alter it as part of building the software in PSoC Creator. Is this possible and how?
Thanks in advance.
Show LessHi everyone.
in Analog start-up, What is the state of the MCU in the event of PBIST2 failure?
As you can see in the figure above, PBIST2 is checking the OV, UV, of various voltages.
For example, if VDDP3 is OV, PBIST2 will fail, what is the state of the MCU?
Does it stop or reset?
Please Let me know.
Thanks
Show LessHello IFX,
市面上flyback的拓扑有很多ACF,LLC,QR等,但是英飞凌为什么要用hybrid flyback,相较于传统的拓扑有什么优势吗?这些拓扑各有什么特点?
谢谢!
Hi All,
I'm trying to get SPI working on my custom target board, which contains a CY8C6116 PSoC.
Using the Device Configurator in MTB 3.0.0, I've selected SBC-5 for SPI 1.0. P11_0 thru P11_3 are configured as; SPI_MOSI, SPI_MISO, SPI_CLK, and SPI_CS0 respectively. There are no warnings about individual pins in the configurator. The symbols are resolved in the code, even though the compiler raises warngings that they're not.
I've added the following init:
cy_rslt_t rslt;
cyhal_spi_t sSPI;
/* Configuring the SPI master: Specify the SPI interface pins, frame size, SPI Motorola mode and slave mode */
rslt = cyhal_spi_init(&sSPI, CYBSP_SPI_MOSI, CYBSP_SPI_MISO, CYBSP_SPI_CLK, CYBSP_SPI_CS, NULL, 8, CYHAL_SPI_MODE_00_MSB, true);
Stepping through the code:
Upon calling cyhal_spi_init(), the symbols values are passed as expected.
Things proceed as expected until about 60-70 lines later (still in the cyhal_spi_init function) when the _CYHAL_SCB_FIND_MAP macro is run. Line 398 of cyhal_spi.c is as follows:
mosi_map = _CYHAL_SCB_FIND_MAP(mosi, cyhal_pin_map_scb_spi_m_mosi);
The macro leaves mosi_map without the correct info. Here's the macro definition from line 155 of cyhal_scb_common.h:
#define _CYHAL_SCB_FIND_MAP(pin, pin_map) \
_cyhal_scb_find_map(pin, pin_map, sizeof(pin_map)/sizeof(cyhal_resource_pin_mapping_t), NULL)
When _cyhal_scb_find_map() is called in the expanded macro, it never finds a match between the pin and the block type. Once it finds the pin (e.g., P11-0), the block type is always CYHAL_RSC_ADC. (It's looking for a CYHAL_RSC_SPI.)
Can anyone tell me what's causing this? I'm new to the PSoC6, MTB, and the Device Configurator (not to mention all the included abstraction). I wouldn't be surprised if I'm making a rookie mistake.
Thanks,
robin
I disabled windowdog and can enter normal status normally. When windowdog is enabled, it is configured as WDI dog feeding mode and normal dog feeding, but it cannot enter the normal state. The STATE bit of DEVSTAT is always 001, not be set to 010, and the ROT is always high, and there is no sign of resetting.
What is the reason?
Show LessHi Team, I am working on TIM, I want to measure time stamp when there is result inside result register of DSADC0Ch1 with the help of TIM.
Below Configuration I did for TIM and DSADC
Ifx_GTM_TIM_CH *pdsadcTimCh = IfxGtm_Tim_getChannel(>m->TIM[tim], rdctimCh); //Gives Tim channel address
driver->hardware.rdcTimCh = &pdsadcTimCh; //rdcTim channel is 1
gtm->TIM[tim].IN_SRC.U = (2 << (4*rdctimCh)); // Selection Aux input inside SRC register of TIM for TIM0CH1
gtm->TIMINSEL[tim].U = (0x0E << (4*rdctimCh)); // This is for input selection as DSADC
gtm->DSADCINSEL[0].U = (1 << (4*rdctimCh)); // Here i am selectiong SRM1
Ifx_GTM_TIM_CH_CTRL ctrl; // Here I did basic configuration for TIM in TIEM mode
ctrl.B = CDDRps_TimCfg;
ctrl.B.DSL = (risingEdge != FALSE) ? 1 : 0;
pdsadcTimCh->CTRL.U = ctrl.U;
Could you please help me to route DSADC result event to TIM0CH1 so that I can measure timestamp.
Show Less1. 例子 SCB\I2C\Master 的 main_cm4.c 文件拷贝到D:\Program Files (x86)\Infineon\T2G_Sample_Driver_Library_7.6.0\tviibe1m\src
2. 打开IAR,工作区删除main_cm0plus.c, 然后src下面add main_cm4.c
3. Rebuild all出现P1_0_SCB0_I2C_SCL,P1_1_SCB0_I2C_SDA,一个时钟,一个数据接口未定义。
请问这个头文件?
4. 案列说明提到的Aardvark是?
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