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OK, we have found the I2S devices and would like to know if it can be used for MPU TO MPU 64-bit data transfers (no sound).
We would like to setup a mirrored set of registers between two 5LP MPUs using DMA transfers.
We are hoping to accomplish the DMA mirroring as a transparent action.
BTW, we have not completed any DMA functions, we will be researching and testing sample code while we wait for a reply.
We found we can use three I2S Masters with a good build in one 5LP device, all of our other signals are GPIO interconnections.
Thanks in advance for your help.
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Q1)PSoC4 Bluetooth version
PSoC4 BLE datasheet describes that Bluetooth version is 4.1 or 4.2.
But PSoC4 BLE product web page describes that Bluetooth version is 5.3 as shown below.
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It includes a royalty-free Bluetooth low energy protocol stack compatible with Bluetooth 5.3
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Which version is correct?
PSoC4 BLE hardware only supports up to 4.1/4.2, but does this mean that Bluetooth certification is compatible up to 5.3?
In other words, is it correct that it is compatible up to version 5.3, but Bluetooth features added after version 4.1/4.2 are optional features are not implemented?
In this case, is it correct that PSoC4 BLE is not suitable if customer needs Bluetooth additional functions after 4.1/4.2?
Q2)PSoC6 Bluetooth version
PSoC6 BLE datasheet describes that Bluetooth version is 5.0.
But PSoC6 BLE product web page describes that Bluetooth version is 5.4 as shown below.
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It includes a royalty-free Bluetooth® LE protocol stack compatible with Bluetooth® 5.4.
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Which version is correct?
PSoC6 BLE hardware only supports up to 5.0, but does this mean that Bluetooth certification is compatible up to 5.4?
In other words, is it correct that it is compatible up to version 5.4, but Bluetooth features added after version 5.0 are optional features are not implemented?
In this case, is it correct that PSoC6 BLE is not suitable if customer needs Bluetooth additional functions after 5.0?
Best Regards.
YuMa
Show LessLocking the Debug Access Ports(CM0,CM4) automatically if there are no debugging operations for a specific time , is this applicable in CYT2B74 ?
Show LessFMAC Driver backport如何编译,可以整体编译吗,怎么指定内核和编译器,如下cypress-fmac-v5.15.58-2023_0901\v5.15.58-backports目录
we built a IMC101T-T038 + FP35R12W2T7 board to run bldc compressor, and control via uart with external microcontroller. Firstly it can start and run this compressor properly, after running for many hours and stop properly. And then restart it, sometime it can start properly and sometime cann ot start properly and the IMC101T didnot report any faults. please advise us the solution. We also attached the mc2 file and running waveform for your reference.
Show LessDear supporter
I want to translate the following KBA, please confirm to my work.
Best Regards.
YuMa
Show LessHello,
For the Tasking compiler integrated in ADS, we know that it requires purchase of a license for production. Can it be used at only development stage in a commercial project?
Show LessHi
I finished a project using the PSoC6BLE Kit board (CYBLE-416045) and I was able to use the SPI instance using scb5. I was able to drive SCLK to 100MHz and my TFT screen loved it. So we went to board with a PS0C6 CY8C6137BZI-F54.
Now I cannot get SPICLK to come out of the serial block unless I set the input clock frequency to 1MHz, and then even I get 250kHz output streams. If I set this to any other frequency, SS and MOSI all work but SCLK is flatline. I can set the mode to start/static with SCLK Hi or Lo, so I know that the component is driving the SCLK line.
I have tried all kinds of clock sources, internal, external, etc. and always the same.
Wondering if there is an errata for this? I have been using PSoC for a very long time, and I spent 12 hours on this and I am stumped.
Please help!
Show LessUsing 1ED3491MU12M to drive the SIC MOSFET and simulating with simetrix, can it skip the starting 200us?
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E9%97%A8%E7%BA%A7%E9%A9%B1%E5%8A%A8%E5%99%A8/%E9%A9%B1%E5%8A%A8IC%E5%90%AF%E5%8A%A8%E6%97%B6%E9%97%B4/td-p/656398
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