Is it possible to configure GPIO 46 for the LV signal for GPIF even though its not in the control block / registers?
Thanks for any info.Show Less
I've had two instances now in my design where a clock signal has ended up on the comparator output . In the first case I had a clock setup on the SOC on the ADC which was ending up on a comparator output and today I had another instance of the same kind of problem, though I haven't been able to determine which clock is present on the signal.
In my design I use the comparator to convert a 422 signal to serial and then internally run the comparator output to a UART component. In the error case, I'm receiving spurious data on the UART. I ran the comparator output to a pin and checked the input lines and the output and noted the signal.
In the first case I managed to remove the SOC signal clock and that fixed the problem but I haven't been able to fix this issue.
It looks to me like there's some conflict on the internal DSI routing but I don't have any visibility into this layer.
Has anyone else noted an issue with clock signals on the comparator output? Or is there a way to visualize internal routing (e.g. a digital netlist) to see where the issue is coming from?
I have the following circuit to drive a 3 phase BLDC motor, I'm generating a 20kHz PWM signal for the MOSFETs, however I'm not sure about the correct pulse width I should use to conmutate the MOSFETs, I'm expecting 15A when the motor is starting and approximately 10A when driving.
The MOSFETs I'm using are the IRFB7730 , VGSon would be 12V, VDS ranges from +54.6V (full charge) and +48V, can anyone help please? I just want to know the recommended maximum pulse-width, and minimum pulse-width.Show Less
I need to observe the USB 3.2 waveform transmitted from the upstream port. To do this, I would like to put the upstream port into USB compliance test mode.
Can you help me obtain information on how to place this device into compliance test mode?Show Less
I am encountering difficulties running MBIST on DSPR. I am utilizing the code from the MTU_MBIST example, and it halts at IfxMtu_clearSram(mbistSel) instruction. I managed to test PSPR by calling Cpu_setSafetyTaskIdentifier(TRUE) before the SRAM initialization. However, this approach does not work with DSPR.
I cannot consider to run MTU from CPU1 or any other core. Could you kindly provide any way to test DSPR by MTU from CPU0?
Thanks everyone.Show Less
I bought the KIT_6W_18V_P7_950V, but the output 18V does not meet my needs, I want to change the output voltage to 15V, how should I modify the circuit？
I am looking to decode Data Flash content (hex file)which takes fee_cfg as input. This is for TC375 microcontroller.