Hi,
on my CYT4BF device i have an Autosar Application running only on CM7 core. For Bootcore CM0+ there is no application available. How do i manage the correct startup and "running" behaviour for the CM0+ core?
Thanks,
Martin
Show LessHello,
I have one question regarding the crystal placement.
Can someone please check our current crystal placement? Is it advisable to place the load capacitors near to the crystal pins or near to the IC? Kindly review the screenshot for our current placement and advise.
Also as per Infineon checklist, it is recommended to use crystal having drive current of around 600uW but in 4-SMD package we are not able to find the desired part. We are only able to get maximum of 300uW, so we added a series resistor for current limiting. Is it a right way? Also which one is better to use with this IC, Crystal or Oscillator?
Thanks in advance
Show Less
Hi,
What is the meaning of table type of pages 0,1,2.. etc in Config mode Get status? Section 3.4 & Table 23, Page No 23
Thanks
Mathan
Show LessHello, I am using an IGBT Module, for a three-phase inverter operation, and the input to the module is a DC Supply from a battery/bench supply. I would like to know any protection features that can be implemented, to prevent any damage by accidentally swapping the DC Supply terminals. Emphasis on avoiding the method involving a Schottky diode in the main DC Line, due to the usage of an IGBT Module and other constraints such as track width of PCB due to high currents being involved. Any alternate methods would be helpful. Thanks and Regards
Hi
I'd like to kwow what is the proper solution to start syncronously the conversion of two ADC channels queue. Lets suppose I've on G8 and G9 two queue of 10 elements (from CH0 to CH9 to make it simple). And I want to start the conversion of these two chains syncronously.. how can I do?
If I set the two queue and combine the two CH0 and master/slave I see that only G8 (the master) continue the conversion to the other channels but G9 convert only the CH0.
Another solution is to use the same trigger signal for both the group and this seems to work... but what is the difference between the two approach?
Thanks in advance
Show LessHi All,
i tried to implement RTos into Tc212 LIbrary which i have done before with the TC387 Board.but for TC212 family i am getting error as below .
16:02:52 **** Incremental Build of configuration Debug for project BmsSwRTos ****
make --output-sync -j8 all
Building target: BmsSwRTos.elf
TASKING VX-toolset for AURIX Development Studio (non-commercial): control program v1.1r8 Build 22011964
ltc E112: cannot locate 60 section(s):
ltc I455: requirement: 32K (0x82d9) bytes of RAM area in space mpe:vtc:linear
ltc I456: section type: range restriction - range(s) 0x70000000-0x7000c000
ltc I456: section type: group restriction - contiguous
ltc I457: .data.Cpu0_Main.g_cpuSyncEvent (5984) (0x4 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P00_0 (3052) (0x8 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P02_6 (3069) (0x8 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P02_7 (3070) (0x8 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P02_8 (3071) (0x8 bytes)
Invoking: TASKING Linker
ltc I457: .data.IfxPort_PinMap.IfxPort_P11_11 (3078) (0x8 bytes)
cctc -lrt -lfp_fpu -lcs_fpu -Wl-Oc -Wl-OL -Wl-Ot -Wl-Ox -Wl-Oy -Wl--map-file="BmsSwRTos.map" -Wl-mc -Wl-mf -Wl-mi -Wl-mk -Wl-ml -Wl-mm -Wl-md -Wl-mr -Wl-mu --no-warnings= -Wl--error-limit=42 --exceptions --strict --anachronisms --force-c++ -Ctc21x -o"BmsSwRTos.elf" -Wl-o"BmsSwRTos.hex:IHEX" --lsl-core=vtc --lsl-file=../Lcf_Tasking_Tricore_Tc.lsl ./OS/FreeRTOS/portable/TriCore/port.o ./OS/FreeRTOS/portable/MemMang/heap_4.o ./OS/FreeRTOS/croutine.o ./OS/FreeRTOS/event_groups.o ./OS/FreeRTOS/list.o ./OS/FreeRTOS/queue.o ./OS/FreeRTOS/stream_buffer.o ./OS/FreeRTOS/tasks.o ./OS/FreeRTOS/timers.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxAsclin_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxCcu6_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxGpt12_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxGtm_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxMultican_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxPort_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxQspi_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxScu_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxSent_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxSmu_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_PinMap/IfxVadc_PinMap.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxAsclin_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxCcu6_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxCpu_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxDma_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxFlash_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxGtm_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxMtu_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxMultican_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxPort_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxQspi_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxScu_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxSent_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxSmu_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxSrc_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxStm_cfg.o ./Libraries/iLLD/TC22A/Tricore/_Impl/IfxVadc_cfg.o ./Libraries/iLLD/TC22A/Tricore/Stm/Std/IfxStm.o ./Libraries/iLLD/TC22A/Tricore/Src/Std/IfxSrc.o ./Libraries/iLLD/TC22A/Tricore/Scu/Std/IfxScuCcu.o ./Libraries/iLLD/TC22A/Tricore/Scu/Std/IfxScuEru.o ./Libraries/iLLD/TC22A/Tricore/Scu/Std/IfxScuWdt.o ./Libraries/iLLD/TC22A/Tricore/Port/Std/IfxPort.o ./Libraries/iLLD/TC22A/Tricore/Port/Io/IfxPort_Io.o ./Libraries/iLLD/TC22A/Tricore/Gtm/Std/IfxGtm.o ./Libraries/iLLD/TC22A/Tricore/Gtm/Std/IfxGtm_Cmu.o ./Libraries/iLLD/TC22A/Tricore/Gtm/Std/IfxGtm_Dpll.o ./Libraries/iLLD/TC22A/Tricore/Gtm/Std/IfxGtm_Tbu.o ./Libraries/iLLD/TC22A/Tricore/Gtm/Std/IfxGtm_Tim.o ./Libraries/iLLD/TC22A/Tricore/Gtm/Std/IfxGtm_Tom.o ./Libraries/iLLD/TC22A/Tricore/Cpu/Trap/IfxCpu_Trap.o ./Libraries/iLLD/TC22A/Tricore/Cpu/Std/IfxCpu.o ./Libraries/iLLD/TC22A/Tricore/Cpu/CStart/IfxCpu_CStart0.o ./Libraries/Service/CpuGeneric/SysSe/Bsp/Assert.o ./Libraries/Service/CpuGeneric/SysSe/Bsp/Bsp.o ./Libraries/Infra/Platform/Tricore/Compilers/CompilerDcc.o ./Libraries/Infra/Platform/Tricore/Compilers/CompilerGhs.o ./Libraries/Infra/Platform/Tricore/Compilers/CompilerGnuc.o ./Libraries/Infra/Platform/Tricore/Compilers/CompilerTasking.o ./Libraries/aurix_pin_mappings.o ./Configurations/Debug/sync_on_halt.o ./AppSw/OsTasks/OsTasks.o ./AppSw/Led/Leds.o ./ASW/WakeupAndPowerManagement/source/WakeupAndPowerManagement.o ./ASW/WakeupAndPowerManagement/config/WakeupAndPowerManagement_Cfg.o ./ASW/VcuCommunication/source/VcuCommunication.o ./ASW/VcuCommunication/config/VcuCommunication_Cfg.o ./ASW/VAndISynchronization/source/VAndISynchronization.o ./ASW/VAndISynchronization/config/VAndISynchronization_Cfg.o ./ASW/Soh/source/Soh.o ./ASW/Soh/config/Soh_Cfg.o ./ASW/Soc/source/Soc.o ./ASW/Soc/config/Soc_Cfg.o ./ASW/Rtc/source/Rtc.o ./ASW/Rtc/config/Rtc_Cfg.o ./ASW/PowerPrediction/source/PowerPrediction.o ./ASW/PowerPrediction/config/PowerPrediction_Cfg.o ./ASW/NvmManagement/source/NvmManagement.o ./ASW/NvmManagement/config/NvmManagement_Cfg.o ./ASW/KLMonitoring/source/KLMonitoring.o ./ASW/KLMonitoring/config/KLMonitoring_Cfg.o ./ASW/FaultAndSafeStateControl/source/FaultAndSafeStateControl.o ./ASW/FaultAndSafeStateControl/config/FaultAndSafeStateControl_Cfg.o ./ASW/FanControl/source/FanControl.o ./ASW/FanControl/config/FanControl_Cfg.o ./ASW/CurrentSensing/source/CurrentSensing.o ./ASW/CurrentSensing/config/CurrentSensing_Cfg.o ./ASW/ChargingController/source/ChargingController.o ./ASW/ChargingController/config/ChargingController_Cfg.o ./ASW/CellDataAcquisition/source/CellDataAcquisition.o ./ASW/CellDataAcquisition/config/CellDataAcquisition_Cfg.o ./ASW/CellBalancing/source/CellBalancing.o ./ASW/CellBalancing/config/CellBalancing_Cfg.o ./ASW/BatteryDisconnect/source/BatteryDisconnect.o ./ASW/BatteryDisconnect/config/BatteryDisconnect_Cfg.o ./Cpu0_Main.o
ltc I457: .data.IfxPort_PinMap.IfxPort_P11_12 (3079) (0x8 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P11_2 (3080) (0x8 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P15_0 (3098) (0x8 bytes)
ltc I457: .data.IfxPort_PinMap.IfxPort_P20_8 (3116) (0x8 bytes)
ltc I453: ... (50 more I457 messages suppressed)
make: *** [makefile:115: BmsSwRTos.elf] Error 1
"make --output-sync -j8 all" terminated with exit code 2. Build might be incomplete.
16:02:54 Build Failed. 2 errors, 0 warnings. (took 1s.883ms)
Kindly help me to solve this and let me know this TC212 controller supports RTos OS or not.
Many Thanks,
Krishnayya
Show LessI designed a USB test module using CYUSB3014. This USB test module is used to test the USB HUB. The module runs the cyfxbulksrcsink example, and the circuit design completely refers to CYUSB3KIT-003.
I simulated some open-circuit and short-circuit faults of the superspeed signal on the USB HUB side, and then verified whether these faults can be detected by the CYUSB3014 module, and found that the following three fault tests failed:
What's the problem?
Is it possible to modify the firmware to solve all or some of the above problems?
If it can't be solved by modifying the firmware, what hardware circuit can solve the above problems, I hope to get your suggestions.
Show LessHello
I have a request on my table including the question whether the SAK-TC333LP-32F200F AA would be usable within this application. Before I go through all the available documents maybe you can tell me whether it is feasible to have and use:
3x SPI, 2xCAN, 4xI2C, 1xI2S and ETH simultaneously? Thank you very much in advance, Thomas
Show Less
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